MPC9449AE IDT, Integrated Device Technology Inc, MPC9449AE Datasheet

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MPC9449AE

Manufacturer Part Number
MPC9449AE
Description
IC CLK FANOUT BUFFER 1:15 52LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Divider, Multiplexer , PLLr
Datasheet

Specifications of MPC9449AE

Number Of Circuits
1
Ratio - Input:output
3:15
Differential - Input:output
Yes/No
Input
LVCMOS, LVPECL
Output
LVCMOS
Frequency - Max
200MHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Frequency-max
200MHz
Number Of Clock Inputs
3
Output Frequency
200MHz
Output Logic Level
LVCMOS
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
LVCMOS/LVPECL
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC9449AE
Manufacturer:
Freescale
Quantity:
160
Part Number:
MPC9449AE
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
MPC9449AER2
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™ / ICS™ 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
3.3 V/2.5 V 1:15 PECL/LVCMOS Clock
Fanout Buffer
for high performance clock tree applications. With output frequencies up to
200 MHz and output skews less than 200 ps the device meets the needs of the
most demanding clock applications.
Features
Functional Description
signals up to a frequency of 200 MHz. The device has 15 identical outputs,
organized in four output banks. Each output bank provides a retimed or
frequency divided copy of the input signal with a near zero skew. The output buffer supports driving of 50 Ω terminated
transmission lines on the incident edge: each output is capable of driving either one parallel terminated or two series terminated
transmission lines.
addition, the MPC9449 accepts one differential PECL clock signal. The DSELx pins choose between division of the input
reference frequency by one or two. The frequency divider can be set individually for each of the four output banks. Applying the
OE control will force the outputs into high-impedance mode.
a 2.5 V or 3.3 V power supply and an ambient temperature range of –40°C to +85°C. The MPC9449 is pin and function
compatible but performance-enhanced to the MPC949. The device is packaged in a 52-lead LQFP package.
The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted
The MPC9449 is specifically designed to distribute LVCMOS compatible clock
Two selectable LVCMOS compatible clock inputs are available. This feature supports redundant differential clock sources. In
All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports
inputs
Supports clock distribution in networking, telecommunication and computing
applications
15 LVCMOS compatible clock outputs
Two selectable LVCMOS and one differential LVPECL compatible clock
Selectable output frequency divider (divide-by-one and divide-by-two)
Maximum clock frequency of 200 MHz
Maximum clock skew of 200 ps
High-impedance output control
3.3 V or 2.5 V power supply
Drives up to 30 series terminated clock lines
Ambient temperature range –40°C to +85°C
52-lead LQFP packaging
52-lead Pb-free package available
Pin and function compatible to MPC949
1
CLOCK FANOUT BUFFER
52-LEAD LQFP PACKAGE
52-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
3.5 V/2.5 V 1:15
PECL/LVCMOS
CASE 848D-03
CASE 848D-03
MPC9449 REV 5 MARCH 14, 2007
FA SUFFIX
AE SUFFIX
MPC9449

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MPC9449AE Summary of contents

Page 1

V/2.5 V 1:15 PECL/LVCMOS Clock Fanout Buffer The MPC9449 2.5 V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less ...

Page 2

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER DSELA CCLK0 CCLK1 CCLK_SEL PCLK PCLK PCLK_SEL DSELB DSELC DSELD MR/ QB2 GND QB1 V QB0 GND GND QA1 V QA0 GND Figure 2. PC9449 52-Lead Package Pinout (Top View) IDT™ ...

Page 3

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER Table 1. Function Table Control Default PCLK_SEL 0 LVCMOS clock input selected (CCLK0 or CCLK1) CCLK_SEL 0 DSELA, DSELB DSELC, DSELD 0 0 MR/OE 1 Table 2. Pin Configuration Pin PCLK, ...

Page 4

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER Table 5. DC Characteristics (V = 3.3 V ± 5 Symbol Characteristics V Input High Voltage IH V Input Low Voltage IL V Output High Voltage OH V Peak-to-Peak Input Voltage ...

Page 5

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER Table 7. DC Characteristics (V CC Symbol Characteristics V Input High Voltage IH V Input Low Voltage IL V Peak-to-Peak Input Voltage PP (1) V Common Mode Range CMR V Output High Voltage ...

Page 6

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER Driving Transmission Lines The MPC9449 clock driver was designed to drive high speed signals in a terminated transmission line environment. To provide the optimum flexibility to the user the output drivers were designed ...

Page 7

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER Pulse Generator Ω Figure 6. CCLK MPC9449 AC Test Reference for V Differential Pulse Generator Ω IDT™ / ICS™ 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER MPC9449 DUT Z ...

Page 8

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER t SK(O) The pin-to-pin skew is defined as the worst case difference in propagation delay be- tween any similar delay path within a single device Figure 8. Output-to-Output Skew t PCLK V PP ...

Page 9

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER 4X 0.20 (0.008 VIEW -H- -T- SEATING 4X PLANE 0.05 (0.002 VIEW AA IDT™ ...

Page 10

MPC9449 3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 netcom@idt.com 408-284-8200 480-763-2056 Fax: 408-284-2775 Corporate Headquarters Asia Pacific and Japan Integrated Device Technology, Inc. Integrated Device ...

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