ICS8737AG-11LFT IDT, Integrated Device Technology Inc, ICS8737AG-11LFT Datasheet - Page 9

• Manufacturer Part Number: ICS8737AG-11LFT
• Description: IC CLOCK GEN LVPECL 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution), Divider, Multiplexerr

Specifications of ICS8737AG-11LFT

• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 650MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 650MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8737AG-11LFT

F
8737AG-11
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
F
F
IGURE
PP
IGURE
IGURE
IFFERENTIAL
3.3V
and V
R5,R6 locate near the driver pin.
3.3V
4C. CLK/nCLK I
LVPECL
4A. CLK/nCLK I
4E. CLK/
1.8V
LVPECL
CMR
R5
100 - 200
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
LVHSTL D
3.3V LVPECL D
3.3V LVPECL D
input requirements. Figures 4A to 4E show
C
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
R6
100 - 200
N
Zo = 50 Ohm
Zo = 50 Ohm
CLK I
Zo = 50 Ohm
Zo = 50 Ohm
RIVER
I
NPUT
NPUT
NPUT
NPUT
R1
50
D
D
D
3.3V
R3
125
C1
C2
RIVER WITH
RIVER
I
R1
84
RIVEN BY
RIVEN BY
RIVEN BY
NTERFACE
SWING
3.3V
R3
125
R2
50
R4
125
R1
84
R2
84
and V
CLK
nCLK
R4
125
R2
84
CLK
nCLK
AC C
3.3V
OH
3.3V
HiPerClockS
Input
must meet the
HiPerClockS
Input
OUPLE
CLK
nCLK
D
3.3V
IFFERENTIAL
HiPerClockS
Input
www.idt.com
9
F
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 4A, the input termination applies for LVHSTL
drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
F
IGURE
IGURE
-
3.3V
3.3V
TO
4D. CLK/nCLK I
4B. CLK/nCLK I
LVDS_Driv er
LVPECL
- 3.3V LVPECL C
3.3V LVDS D
3.3V LVPECL D
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
NPUT
NPUT
RIVER
R1
50
R3
50
D
D
RIVER
RIVEN BY
RIVEN BY
L
ICS8737-11
R2
50
OW
LOCK
R1
100
CLK
nCLK
3.3V
S
KEW
HiPerClockS
REV. C AUGUST 9, 2010
G
Input
CLK
nCLK
ENERATOR
3.3V
, 1/ 2
Receiv er