W40S11-02H Cypress Semiconductor Corp, W40S11-02H Datasheet - Page 5

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W40S11-02H

Manufacturer Part Number
W40S11-02H
Description
IC CLK BUFF 10OUT SDRAM 28SSOP
Manufacturer
Cypress Semiconductor Corp
Type
Clock Bufferr
Datasheet

Specifications of W40S11-02H

Output
CMOS
Frequency - Max
133MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Frequency-max
133MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Input
-
Other names
428-1401

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How To Use the Serial Data Interface
Electrical Requirements
Figure 1 illustrates electrical characteristics for the serial inter-
face bus used with the W40S11-02. Devices send data over
the bus with an open drain logic output that can (a) pull the bus
line LOW, or (b) let the bus default to logic 1. The pull-up resis-
tor on the bus (both clock and data lines) establish a default
SERIAL BUS DATA LINE
SERIAL BUS CLOCK LINE
C L O C K O U T
CLOCK IN
(SERIAL BUS MASTER TRANSMITTER)
CHIP SET
N
S D C L K
DATA OUT
Figure 1. Serial Interface Bus Electrical Characteristics
DATA IN
N
SDATA
V D D
5
~ 2k
logic 1. All bus devices generally have logic inputs to receive
data.
Although the W40S11-02 is a receive-only device (no data
write-back capability), it does transmit an “acknowledge” data
pulse after each byte is received. Thus, the SDATA line can
both transmit and receive data.
The pull-up resistor should be sized to meet the rise and fall
times specified in AC parameters, taking into consideration to-
tal bus line capacitance.
CLOCK IN
(SERIAL BUS SLAVE RECEIVER)
V D D
~ 2k
CLOCK DEVICE
S C L O C K
DATA OUT
DATA IN
W40S11-02
N
SDATA

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