W40S11-02H Cypress Semiconductor Corp, W40S11-02H Datasheet - Page 4

• Manufacturer Part Number: W40S11-02H
• Description: IC CLK BUFF 10OUT SDRAM 28SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Bufferr

Specifications of W40S11-02H

• Output: CMOS
• Frequency - Max: 133MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 133MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Input: -
• Other names: 428-1401

Writing Data Bytes
Each bit in the data bytes control a particular device function.
Bits are written MSB (most significant bit) first, which is bit 7.
Table 2. Data Bytes 0–2 Serial Configuration Map
Note:
2.
Data Byte 0 SDRAM Active/Inactive Register (1=Enable, 0=Disable)
Data Byte 1 SDRAM Active/Inactive Register (1=Enable, 0=Disable)
Data Byte 2 SDRAM Active/Inactive Register (1=Enable, 0=Disable)
At power-up all SDRAM outputs are enabled and active. It is recommended to program Bits 4–7 of Byte0 and Bits 0–3 of Byte1 to a “0” to save power and reduce
noise.
Bit(s)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Pin No.
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
27
26
23
22
18
11
7
6
3
2
Affected Pin
Pin Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SDRAM3
SDRAM2
SDRAM1
SDRAM0
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM9
SDRAM8
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Control Function
[2]
4
Table 2 gives the bit formats for registers located in Data Bytes
0–6.
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0
Bit Control
W40S11-02
Active
Active
Active
Active
Active
Active
Active
Active
Active
Active
--
--
--
--
--
--
--
--
--
--
--
--
--
--
1