SI5013-BM Silicon Laboratories Inc, SI5013-BM Datasheet - Page 24

IC CLOCK/DATA RECOVERY 28MLP

SI5013-BM

Manufacturer Part Number
SI5013-BM
Description
IC CLOCK/DATA RECOVERY 28MLP
Manufacturer
Silicon Laboratories Inc
Type
Clock and Data Recovery (CDR)r
Datasheets

Specifications of SI5013-BM

Input
Differential
Output
CML
Frequency - Max
675MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
675MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
336-1122

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5013-BM
Manufacturer:
SILICON
Quantity:
5 000
Part Number:
SI5013-BM
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Si5013
Document Change List
Revision 0.2 to Revision 1.0
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Revision 1.0 to Revision 1.1
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24
Added Figure 4, “PLL Acquisition Time,” on page 6.
Table 2 on page 8
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Table 3 on page 9
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Table 4 on page 10
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Removed “Hysteresis Dependency” Figure.
Added Figure 7, “LOS Signal Hysteresis,” on page
14.
Corrected error: Table 8 on page 19—changed
description for LOS_LVL from “LOS is disabled when
the voltage applied is less than 500 mV” to “LOS is
disabled when the voltage applied is less than
1.0 V.”
Corrected “Revision 0.2 to Revision 1.0” Change
List.
Table 4 on page 10
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(REFCLK)
applied)
(reference-less operation)
goes out of Lock
goes into Lock
Updated values: Supply Current
Updated values: Power Dissipation
Updated values: Common Mode Input Voltage
Updated values: Output Common Mode Voltage
Updated values: Output Clock Rise Time
Updated values: Output Clock Fall Time
Updated values: Clock to Data Delay t
Updated values: Jitter Tolerance (OC-12)
Updated values: RMS Jitter Generation
Updated values: Peak-to-Peak Jitter Generation
Updated values: Acquisition Time (reference clock
Updated values: Acquisition Time
Updated values: Freq Difference at which Receive PLL
Updated values: Freq Difference at which Receive PLL
Updated values: Jitter Tolerance (OC-3)
Cf-D
Rev. 1.3
Revision 1.1 to Revision 1.2
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Revision 1.2 to Revision 1.3
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Added Figure 5, “LOS Response,” on page 7.
Updated Table 2 on page 8.
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updated values.
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updated values.
Updated Table 3 on page 9.
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values.
Updated Table 8 on page 19.
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Updated Figure 16, “28-Lead Micro Leaded Package
(MLP),” on page 23.
Updated Table 9, “Package Diagram Dimensions,”
on page 23.
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Updated Figure 16, “28-Lead Micro Leaded Package
(MLP),” on page 23.
Updated Table 9, “Package Diagram Dimensions,”
on page 23.
Added “Output Common Mode Voltage (CLKOUT)” with
Added “Output Common Mode Voltage (DOUT)” with
Added “Output Clock Duty Cycle—OC-12/3.”
Added “Loss-of-Signal Response Time” with updated
Changed “clock input” to “DIN inputs” for Loss Of Signal
Changed dimension A.
Changed dimension E2.

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