ICS932S200BFLFT IDT, Integrated Device Technology Inc, ICS932S200BFLFT Datasheet - Page 5

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ICS932S200BFLFT

Manufacturer Part Number
ICS932S200BFLFT
Description
IC FREQ TIMING GENERATOR 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS932S200BFLFT

Input
Crystal
Output
Clock
Frequency - Max
133MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
133MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
932S200BFLFT
PCI_STOP# Timing Diagram
PCI_STOP# is an input to the clock synthesizer and must be made synchronous to the clock driver PCICLK_F output.
It is used to turn off the PCI clocks for low power operation. PCI clocks are required to be stopped in a low state and
started such that a full high pulse width is guaranteed. ONLY one rising edge of PCICLK_F is allowed after the clock
control logic switched for the PCI outputs to become enabled/disabled.
0427D—12/15/08
Notes:
1. All timing is referenced to CPUCLK.
2. Internal means inside the chip.
3. All other clocks continue to run undisturbed.
4. PD# and CPU_STOP# are shown in a high state.
5. Diagrams shown with respect to 133MHz. Similar operation when CPU is 100MHz.
CPU_STOP#
PCI_STOP#
CPUCLK
PCICLK
PCICLK
(internal)
(externall)
(internal)
PD#
5
ICS932S200

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