IDTCV145NLG IDT, Integrated Device Technology Inc, IDTCV145NLG Datasheet

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IDTCV145NLG

Manufacturer Part Number
IDTCV145NLG
Description
IC CLK BUFFER 1-19 DIFF 72VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Bufferr
Datasheet

Specifications of IDTCV145NLG

Input
Clock
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
72-VFQFN, 72-VFQFPN
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
CV145NLG
FEATURES:
• Compliant with Intel DB1900G
• DIF Clock Support
• OE pin Control of All Outputs
• 3.3 V Operation
• Gear Ratio supporting generation of clocks at a different
• Split outputs supporting options of 2 outputs @1:1 and
• Pin level OE control of individual outputs
• Multiple output frequency options up to 400Mhz as a gear ratio
• Output is HCSL compatible
• SMBus Programmable configurations
• PLL Bypass Configurable
• SMBus address configurable to allow multiple buffer control in
• Programmable Bandwidth
• Glitchfree transition between frequency states
• Available in 72-pin VFQPFN package
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
© 2005 Integrated Device Technology, Inc.
IDTCV145
1-TO-19 DIFFERENTIAL CLOCK BUFFER
frequency ratioed from the input.
remaining 17 pairs at an alternate gear
of input clocks of 100-400Mhz
a single control network
19 differential clock output pairs @ 0.7 V
150 ps skew performance across all outputs
SA_2/PLL_BYPASS#
HIGH_BW#
OE_01234#
OE_17_18#
CLK_IN#
OE[16:5]#
CLK_IN
SDA
SCL
PD#
1-TO-19 DIFFERENTIAL
CLOCK BUFFER
PLL
Controller
Control
SM Bus
Output
1
DESCRIPTION:
to work in conjunction with the main clock of CK409, CK410/CK410M and
CK410B etc., PLL is off in bypass mode and no clock detect.
The CV145 differential buffer complies with Intel DB1900G , and is designed
Output
Buffer
COMMERCIAL TEMPERATURE RANGE
DIF_18
DIF_18#
DIF_0
DIF_1
DIF_2
DIF_3
DIF_4
DIF_5
DIF_6
DIF_0#
DIF_1#
DIF_2#
DIF_3#
DIF_4#
DIF_5#
DIF_6#
JUNE 2006
IDTCV145
DSC-6753/14

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IDTCV145NLG Summary of contents

Page 1

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER FEATURES: • Compliant with Intel DB1900G • DIF Clock Support − 19 differential clock output pairs @ 0.7 V − 150 ps skew performance across all outputs • OE pin Control of All Outputs • ...

Page 2

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER PIN CONFIGURATION IREF PD# 3 HIGH_BW# 4 FSA 5 DIF_0 6 DIF_0# 7 DIF_1 8 DIF_1 DIF_2 12 DIF_2# 13 DIF_3 14 DIF_3# 15 ...

Page 3

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER ABSOLUTE MAXIMUM RATINGS Symbol Description V 3.3V Core Supply Voltage DDA V 3.3V Logic Input Supply Voltage GND - 0.5 DDIN T Storage Temperature STG T Ambient Operating Temperature AMBIENT T Case Temperature CASE ESD ...

Page 4

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER INDEX BLOCK WRITE PROTOCOL Bit # of bits From 1 1 Master Start 2-9 8 Master See SMBus Address Mode table 10 1 Slave Ack (Acknowledge) 11-18 8 Master Register offset byte (starting byte) 19 ...

Page 5

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER GEAR RATIOS Select FSA SMBus3 ...

Page 6

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER TARGETED INPUT AND OUTPUT FREQUENCIES Input (MHz) Output (MHz) 200 200 267 133 160 320 333 167 200 400 400 200 200 133 133 200 400 133 133 167 167 133 333 133 200 267 ...

Page 7

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER CONTROL REGISTERS BYTE 0 Bit Output(s) Affected 7 Group of 17 gear # DIF [16:0] Speed selection 6 Group of 2 gear # DIF [18:17] Speed selection 5 Reserved 4 FSA latched input 3 SMBus3 ...

Page 8

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER BYTE 4 Bit Output(s) Affected 7 Readback - OE#_17_18 Input 6 Readback - OE#_16 Input 5 Readback - OE#_15 Input 4 Readback - OE#_14 Input 3 Readback - OE#_13 Input 2 Readback - OE#_12 Input ...

Page 9

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER DC OPERATING CHARACTERISTICS Following Conditions Apply Unless Otherwise Specified: Operating Condition 3.3V ± DDA Symbol Parameter V 3.3 V Core Supply Voltage DDA V 3.3 V I/O Supply Voltage DD ...

Page 10

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER DIF TIMING CHARACTERISTICS (NON SSC CLOCK INPUT) DIF 0 Timing Characteristics (Non-Spread Spectrum Mode) Symbol Laccuracy Long Accuracy Tperiod Average Period Tabsmin Absolute Minimum Host CLK Period Trise Rise Time Tfall Fall Time ...

Page 11

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER BUFFER POWER-UP STATE MACHINE State Description State0 Power off State1 After 3.3V supply is detected to rise above 1.8-2V, the buffer enters state1 and initiates a 0.2ms-0.3ms delay.The total power up latency from power on ...

Page 12

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER ORDERING INFORMATION IDTCV XXX XX Device Type Package CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X Grade Blank Commercial Temperature Range (0°C to +70°C) NL Very Fine Pitch Quad Flat Pack ...

Page 13

IDTCV145 1-TO-19 DIFFERENTIAL CLOCK BUFFER REVISION HISTORY JUNE 08, 2006 Updated Electrical Characteristics pages (9-10). COMMERCIAL TEMPERATURE RANGE 13 ...

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