ICS9FG1901CKLF IDT, Integrated Device Technology Inc, ICS9FG1901CKLF Datasheet
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ICS9FG1901CKLF
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ICS9FG1901CKLF Summary of contents
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Integrated Circuit Systems, Inc. Frequency Generator for P4 Recommended Application: DB1900G: CPU Host Bus, PCI Express and Fully-Buffered DIMM clocking Features: • Power up default is all outputs in 1:1 mode • DIF_(16:0) can be “gear-shifted” from the input CPU ...
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Integrated Circuit Systems, Inc. Pin Description PIN # PIN NAME PIN TYPE 1 IREF OUT 2 GNDA PWR 3 VDDA/PD# PWR 4 HIGH_BW# 5 FS_A_410 6 DIF_0 OUT 7 DIF_0# OUT 8 DIF_1 OUT 9 DIF_1# OUT 10 GND PWR ...
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Integrated Circuit Systems, Inc. Pin Description (Continued) PIN # PIN NAME PIN TYPE 37 OE9 DIF_9 OUT 39 DIF_9# OUT 40 OE10 DIF_10 OUT 42 DIF_10# OUT 43 OE11 DIF_11 OUT 45 DIF_11# OUT ...
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Integrated Circuit Systems, Inc. General Description The ICS9FG1901 follows the Intel DB1900G Differential Buffer Specification. This buffer provides 19 output clocks for CPU Host Bus, PCI-Express, or Fully Buffered DIMM applications. The outputs are configured with two groups. Both groups, ...
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Integrated Circuit Systems, Inc. ICS9FG1901 Programmable Gear Ratios SMBus Byte 0 Input Output (m) ( ...
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Integrated Circuit Systems, Inc. Absolute Max Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Input Supply Voltage Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature Input ESD protection ESD prot human body model Electrical Characteristics - ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - DIF 0.7V Current Mode Differential Pair 70° 3.3 V +/-5%; C =2pF PARAMETER SYMBOL Current Source Output Impedance Voltage High Voltage Low Max ...
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Integrated Circuit Systems, Inc. PLL Bandwidth and Peaking Parameter PLL Jitter Peaking j peak-hibw PLL Jitter Peaking j peak-lobw PLL Bandwidth pll PLL Bandwidth pll Output phase jitter impact – PCIe* Gen1 Output phase jitter impact – FBD NOTES: 1. ...
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Integrated Circuit Systems, Inc. SMB_A(2:0) = 000 SMB Adr: D0 (DB1900G) SMB_A(2:0) = 001 SMB Adr: D2 (DB1900G) SMB_A(2:0) = 010 SMB Adr: D4 (DB1900G) SMB_A(2:0) = 011 SMB Adr: D6 (DB1900G) SMB_A(2:0) = 100 SMB Adr: D8 (DB1900G) SMB_A(2:0) ...
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Integrated Circuit Systems, Inc. SMBusTable: FSB Frequency Select Register Byte 0 Pin # Name DIF(16:0) GRSEL_17 Bit 7 DIF(18:17) GRSEL_2 Bit 6 Bit 5 - Bit 4 - FSBG_3 Bit 3 - FSBG_2 Bit 2 - FSBG_1 Bit 1 - ...
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Integrated Circuit Systems, Inc. SMBusTable: Output Enable Readback Register Byte 4 Pin # Name 69 Bit 7 60 Bit 6 Bit Bit 4 51 Bit 3 48 Bit 2 43 Bit 1 40 Bit 0 SMBusTable: Vendor ...
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Integrated Circuit Systems, Inc. SMBusTable: Control Pin Readback Register Byte 8 Pin # Name 5 Bit 7 Bit 6 Bit 5 DIF_18 Bit 4 DIF_17 Bit 3 DIF_16 Bit 2 DIF_15 Bit 1 DIF_14 Bit 0 SMBusTable: Reserved Register Byte ...
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Integrated Circuit Systems, Inc. SMBus Table: Gearing PLL Frequency Control Register Byte 12 Pin # Name - Gearing PLL N Div7 Bit 7 - Gearing PLL N Div6 Bit 6 Gearing PLL N Div5 Bit Gearing PLL ...
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Integrated Circuit Systems, Inc. SMBusTable: Reserved Register Byte 16 Pin # Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SMBus Table: 1:1 PLL Frequency Control Register Byte 17 Pin # Name ...
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Integrated Circuit Systems, Inc. SMBusTable: Reserved Register Byte 20 Pin # Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SMBusTable: Test Byte Register Byte 21 Test ` Bit 7 Bit 6 ...
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Integrated Circuit Systems, Inc. DIMENSIONS SYMBOL MIN 0.18 e Ordering Information ICS9FG1901yKLF-T Example: ICS XXXX 0962E—01/02/07 THERMALLY ENHANCED, VERY THIN, FINE PITCH QUAD FLAT / NO LEAD PLASTIC PACKAGE ...
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Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description 1. Added Symbol "A" to Dimensions table. A 4/25/2005 2. Preliminary Release. B 12/19/2005 1. Rearranged page 1 to enlarge Pin Configuration 1. Updated TBD to actual values. 2. Added ...