ICS9EMS9633BKLFT IDT, Integrated Device Technology Inc, ICS9EMS9633BKLFT Datasheet - Page 10

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ICS9EMS9633BKLFT

Manufacturer Part Number
ICS9EMS9633BKLFT
Description
IC EMBEDDED PC MAIN CLK 48VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS9EMS9633BKLFT

Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
48-MLF
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS9EMS9633BKLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT
1
2
3
4
5
falling edge of CLK#. It is measured using a +/-75mV window centered on the average cross point where CLK meets CLK#.
6
7
1
2
Notes on Electrical Characteristics:
Clock Periods Differential Outputs with Spread Spectrum Enabled
Clock Periods Differential Outputs with Spread Spectrum Disabled
Electrical Characteristics - SMBus Interface
Measurement Window
Measurement Window
Guaranteed by design and characterization, not 100% tested in production.
Guaranteed by design and characterization, not 100% tested in production.
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
Slew rate measured through Vswing centered around differential zero
Vxabs is defined as the voltage where CLK = CLK#
Only applies to the differential rising edge (CLK rising and CLK# falling)
Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of CLK and
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz
Operation under these conditions is neither implied, nor guaranteed.
Maximum SMBus Operating
ICS9EMS9633
ULTRA MOBILE PC CLOCK FOR EMBEDDED APPLICATIONS
TM
Low-level Output Voltage
Clock/Data Rise Time
/ICS
Clock/Data Fall Time
Definition
Definition
Current sinking at
Symbol
Symbol
SMBus Voltage
PARAMETER
V
SCLK/SDATA
SCLK/SDATA
TM
OLSMB
Frequency
Ultra Mobile PC Clock for Embedded Applications
SRC 100
CPU 100
CPU 133
CPU 166
SRC 100
CPU 100
CPU 133
CPU 166
DOT 96
= 0.4 V
Absolute
Minimum
Absolute
Minimum
Absolute
Absolute
10.16560
1 Clock
9.87400
9.91400
7.41425
5.91440
1 Clock
9.87400
9.91400
7.41425
5.91440
Period
Period
Period
Period
Lg-
Lg-
Short-term
Short-term
Minimum
Minimum
Absolute
Absolute
Average
Average
9.99900
9.99900
7.49925
5.99940
SYMBOL
Period
Period
-SSC
-SSC
F
1us
1us
V
I
PULLUP
T
T
SMBUS
V
OLSMB
RI2C
FI2C
DD
Long-Term
Long-Term
-ppm error
-ppm error
Minimum
Minimum
Absolute
Absolute
10.41560
Average
Average
9.99900
9.99900
7.49925
5.99940
9.99900
9.99900
7.49925
5.99940
Period
Period
0.1s
0.1s
(Max VIL - 0.15) to
(Min VIH + 0.15) to
Nominal
10.00000
10.00000
Nominal
10.00000
10.00000
10.41670
7.50000
6.00000
7.50000
6.00000
Period
Period
(Min VIH + 0.15)
(Max VIL - 0.15)
0ppm
0ppm
0.1s
0.1s
CONDITIONS
SMB Data Pin
Block Mode
@ I
PULLUP
+ ppm error
+ ppm error
Long-Term
Long-Term
Maximum
Maximum
10.00100
10.00100
10.00100
10.00100
10.41770
Average
Average
7.50075
6.00060
7.50075
6.00060
0.1s
0.1s
10
Short-term
Short-term
Maximum
Maximum
10.05130
10.05130
Average
Average
7.53845
6.03076
+SSC
+SSC
1us
1us
MIN
2.7
4
Maximum
Maximum
10.17630
10.13630
10.17630
10.13630
10.66770
1 Clock
7.62345
6.11576
1 Clock
7.62345
6.11576
Period
Period
Lg+
Lg+
MAX
1000
300
100
3.3
0.4
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNITS
kHz
mA
ns
ns
V
V
Notes
Notes
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
Notes
1
1
1
1
1
1
Datasheet
1617—08/19/09

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