ICS9DB823BGLFT IDT, Integrated Device Technology Inc, ICS9DB823BGLFT Datasheet - Page 14

• Manufacturer Part Number: ICS9DB823BGLFT
• Description: IC PC CLOCK 3.3V 48-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Bufferr

Specifications of ICS9DB823BGLFT

• Input: Clock
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 9DB823BGLFT

IDT
SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD)
SMBus Table: Output Control Register
NOTE: The SMBus Output Enable Bit must be '1' AND the respective OE pin must be active for the output to run!
SMBus Table: OE Pin Control Register
SMBus Table: Reserved Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
9DB823B
Eight Output Differential Buffer for PCIe for Gen 1, Gen 2 and QPI
®
Byte 0
Byte 1
Byte 2
Byte 3
Eight Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI
42,41
38,37
34,33
30,29
20,21
16,17
12,13
42,41
38,37
34,33
30,29
20,21
16,17
12,13
8,9
8,9
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
STOP_Mode
PD_Polarity
BYPASS#1
BYPASS#0
SRC_DIV#
PLL_BW#
PD_Mode
Reserved
Name
Name
DIF_7
DIF_6
DIF_5
DIF_4
DIF_3
DIF_2
DIF_1
DIF_0
Name
DIF_7
DIF_6
DIF_5
DIF_4
DIF_3
DIF_2
DIF_1
DIF_0
Name
DIF_7 Stoppable with OE7
DIF_6 Stoppable with OE6
DIF_5 Stoppable with OE5
DIF_4 Stoppable with OE4
DIF_3 Stoppable with OE3
DIF_2 Stoppable with OE2
DIF_1 Stoppable with OE1
DIF_0 Stoppable with OE0
SRC Divide by 2 Select
DIF_Stop# drive mode
Control Function
Select PD polarity
Control Function
Control Function
Control Function
BYPASS#/PLL1
BYPASS#/PLL0
PD# drive mode
Select PLL BW
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Reserved
14
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
High BW
Free-run
Free-run
Free-run
Free-run
Free-run
Free-run
Free-run
Free-run
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
driven
driven
Readback Table
Readback Table
Low
x/2
0
0
0
0
See Bypass
See Bypass
Reserved
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Stoppable
Low BW
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
High
Hi-Z
Hi-Z
x/1
1444D - 08/31/10
1
1
1
1
Default
Default
Default
Default
Input
Input
X
X
X
X
X
X
X
X
X
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0