ICS9DB102BGLF IDT, Integrated Device Technology Inc, ICS9DB102BGLF Datasheet - Page 8

• Manufacturer Part Number: ICS9DB102BGLF
• Description: IC BUFFER PCI EXPRESS 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay Bufferr
• Series: -r

Specifications of ICS9DB102BGLF

• Input: Clock
• Output: HCSL
• Frequency - Max: 101MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 101MHz
• Number Of Elements: 1
• Supply Current: 100mA
• Pll Input Freq (min): 80MHz
• Pll Input Freq (max): 105MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 9DB102BGLF

IDT
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D4
• IDT clock will acknowledge
• Controller (host) sends the begining byte location = N
• IDT clock will acknowledge
• Controller (host) sends the data byte count = X
• IDT clock will acknowledge
• Controller (host) starts sending Byte N through
• IDT clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
ICS9DB102
Two Output Differential Buffer for PCIe Gen1 & Gen2
®
Byte N + X -1
Two Output Differential Buffer for PCIe Gen1 & Gen2
WR
P
T
Beginning Byte N
Data Byte Count = X
Index Block Write Operation
Beginning Byte = N
Slave Address D4
Byte N + X - 1
Controller (Host)
General SMBus serial interface information for the ICS9DB102
starT bit
stoP bit
WRite
(h)
IDT (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(h)
8
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D4
• IDT clock will acknowledge
• Controller (host) sends the begining byte
• IDT clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D5
• IDT clock will acknowledge
• IDT clock will send the data byte count = X
• IDT clock sends Byte N + X -1
• IDT clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
WR
location = N
was written to byte 8)
RD
RT
N
P
T
Index Block Read Operation
Beginning Byte = N
Slave Address D4
Slave Address D5
Controller (Host)
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(h)
(h)
.
IDT (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
852
ACK
ACK
ACK
REV M 01/27/11
(h)
(h)
(h)