ICS9DBL411BKILF IDT, Integrated Device Technology Inc, ICS9DBL411BKILF Datasheet - Page 5

• Manufacturer Part Number: ICS9DBL411BKILF
• Description: IC FAN/BUFF DIFF 20VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Bufferr

Specifications of ICS9DBL411BKILF

• Input: Differential
• Output: Differential
• Frequency - Max: 150MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-MLF®, QFN
• Frequency-max: 150MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1927

IDT
Absolute Maximum Ratings
Electrical Characteristics - Input/Supply/Common Output Parameters
Clock stabilization time (from all
Differential Input High Voltage
Differential Input Low Voltage
ICS9DBL411B
Four Output Low Power Differential Buffer for PCI Express Gen1, Gen2, and QPI
OE# high to first OE# low).
®
Operating Supply Current
Maximum Supply Voltage
Maximum Supply Voltage
Ambient Operating Temp
Input Slew Rate - DIF_IN
(at least one OE# is low)
Maximum Input Voltage
Minimum Input Voltage
Input Leakage Current
Four Output Low Power Differential Buffer for PCI Express for Gen1, Gen2, and QPI
Storage Temperature
Power Down Current
Input ESD protection
(All OE# pins High)
Input High Voltage
Input Capacitance
Input Low Voltage
Input Frequency
Supply Voltage
Supply Voltage
Pin Inductance
PARAMETER
PARAMETER
OE# latency
Tdrive_OE#
Trise_OE#
Tfall_OE#
VDDxxx_IO
TambCOM
TambIND
I
I
ESD prot
SYMBOL
SYMBOL
VDD_IO
VDDxxx
DD_IO_133M
DD_SB_3.3V
I
T
I
VDDA
T
DD_SBIO
DD_3.3V
T
V
V
V
dv/dt
T
T
V
C
OE#LAT
L
DROE#
V
C
V
Ts
STAB
IHSE
IHDIF
ILDIF
I
FALL
RISE
ILSE
F
OUT
IN
pin
IH
IL
IN
i
Low-Voltage Differential I/O Supply
Low-Voltage Differential I/O Supply
VDD_IO supply @ fOP = 133MHz
Delay from assertion of first OE#
to first clock out (assumes input
VDD_IO supply, Input stopped,
Number of clocks to enable or
assertion/deassertion of OE#
(single-ended measurement)
(single-ended measurement)
VDDA supply current, Input
Fall/rise time of OE# inputs
stopped, OE# pins all high
Output pin capacitance
Measured differentially
3.3V LVCMOS Inputs
VDDA supply current
Core Supply Voltage
V
Human Body Model
Single-ended inputs
Single-ended inputs
Commercial Range
disable output from
Output enable after
OE# de-assertion
IN
Differential inputs
Differential inputs
Industrial Range
OE# pins all high
CONDITIONS
CONDITIONS
Supply Voltage
clock running)
= V
Logic Inputs
V
Any Input
DD
DD ,
= 3.3 V
-
V
IN
= GND
5
Vss - 0.5
V
V
3.135
SS
SS
2000
0.99
0.99
MIN
MIN
600
-40
-65
0.4
1.5
15
-5
0
2
1
- 0.3
- 0.3
V
DD
3.465
3.465
MAX
MAX
1.15
150
300
750
150
150
150
4.6
3.8
4.6
0.8
70
85
20
20
10
8
5
7
5
6
3
5
5
+ 0.3
Advance Information
periods
UNITS
UNITS
V/ns
MHz
mA
mA
nH
°C
°C
uA
uA
uA
pF
pF
ns
ns
ns
ns
°
V
V
V
V
V
V
V
V
V
V
V
C
Notes
Notes
1,7,8
1,7
1,7
1,7
1,7
1,7
1
1
1
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1645B—04/23/10