ICS9DBL411BKILF IDT, Integrated Device Technology Inc, ICS9DBL411BKILF Datasheet - Page 3

• Manufacturer Part Number: ICS9DBL411BKILF
• Description: IC FAN/BUFF DIFF 20VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Bufferr

Specifications of ICS9DBL411BKILF

• Input: Differential
• Output: Differential
• Frequency - Max: 150MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-MLF®, QFN
• Frequency-max: 150MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1927

TSSOP Pin Description
IDT
(TSSOP)
ICS9DBL411B
Four Output Low Power Differential Buffer for PCI Express Gen1, Gen2, and QPI
®
PIN #
10
11
12
13
14
15
16
17
18
19
20
Four Output Low Power Differential Buffer for PCI Express for Gen1, Gen2, and QPI
1
2
3
4
5
6
7
8
9
OE0#
DIF_INC
DIF_INT
VDDA
GNDA
OE3#
DIF3C_LPR
DIF3T_LPR
VDD_IO
GND
DIF2C_LPR
DIF2T_LPR
OE2#
DIF1C_LPR
DIF1T_LPR
OE1#
GND
VDD_IO
DIF0C_LPR
DIF0T_LPR
PIN NAME
PIN TYPE
PWR
PWR
PWR
GND
GND
GND
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
Output Enable for DIF0 output. Control is as follows:
0 = enabled, 1 = Low-Low
Complement side of differential input clock
True side of differential input clock
3.3V Power for the Analog Core
Ground for the Analog Core
Output Enable for DIF3 output. Control is as follows:
0 = enabled, 1 = Low-Low
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
Power supply for low power differential outputs, nominal 1.05V to 3.3V
Ground pin
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
Output Enable for DIF2 output. Control is as follows:
0 = enabled, 1 = Low-Low
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
Output Enable for DIF1 output. Control is as follows:
0 = enabled, 1 = Low-Low
Ground pin
Power supply for low power differential outputs, nominal 1.05V to 3.3V
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND needed)
3
DESCRIPTION
Advance Information
1645B—04/23/10