MCIMX255AJM4A Freescale, MCIMX255AJM4A Datasheet - Page 67

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MCIMX255AJM4A

Manufacturer Part Number
MCIMX255AJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX255AJM4A

Lead Free Status / RoHS Status
Compliant

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Freescale Semiconductor
NF1
NF2
NF3
NF4
ID
NFCLE setup time
NFCLE hold time
NFCE setup time
NFCE hold time
NFCLE
NFCE
NFWE
NFALE
NFIO[15:0]
NFCLE
NFCE
NFRE
NFRB
NFIO[15:0]
Parameter
i.MX25 Applications Processor for Automotive Products, Rev. 4
Figure 36. Write Data Latch Cycle Timing Diagram
Figure 37. Read Data Latch Cycle Timing Diagram
NF12
NF6
Symbol
Table 53. NFC Timing Parameters
tCLH
tCLS
NF3
tCS
tCH
NF1
Data from NF
2T–5.0 ns
7T–5.0 ns
T–1.0 ns
T–2.0 ns
Data to NF
T = NFC Clock Cycle
NF8
NF5
NF13
Min.
NF16
NF10
NF14
Timing
NF9
NF17
NF11
NF15
Max.
NF7
1
NFC Clock
Example Timing for
Min.
205
29
28
55
T = 30 ns
33 MHz
Max.
Unit
ns
ns
ns
ns
67

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