MCIMX255AJM4A Freescale, MCIMX255AJM4A Datasheet - Page 113
MCIMX255AJM4A
Manufacturer Part Number
MCIMX255AJM4A
Description
Manufacturer
Freescale
Datasheet
1.MCIMX255AJM4A.pdf
(132 pages)
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Figure 84
for any value of N equal or greater than 1.
3.7.19
This section describes the timing of the UART module in serial and parallel mode.
3.7.19.1
3.7.19.1.1
Figure 85
bit.
Freescale Semiconductor
Table 84
(output)
TXD
represents the usage of the ADC with idle cycles between conversions. This diagram is valid
shows the UART transmit timing in RS-232 serial mode, showing only 8 data bits and 1 stop
UART Timing
describes the timing parameter (UA1) shown in the figure.
UART RS-232 Serial Mode Timing
UART Transmit Timing in RS-232 Serial Mode
Start
UA1
Bit
Figure 85. UART RS-232 Serial Mode Transmit Timing Diagram
Figure 84. ADC Usage with Idle Cycles Between Conversions
Bit 0
i.MX25 Applications Processor for Automotive Products, Rev. 4
Bit 1
Bit 2
Bit 3
UA1
Bit 4
Bit 5
Bit 6
Bit 7
Possible
Par Bit
Parity
UA1
Bit
STOP
UA1
BIT
Next
Start
Bit
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