MCIMX253CJM4A Freescale, MCIMX253CJM4A Datasheet - Page 57
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MCIMX253CJM4A
Manufacturer Part Number
MCIMX253CJM4A
Description
Manufacturer
Freescale
Datasheet
1.MCIMX253CJM4A.pdf
(142 pages)
Specifications of MCIMX253CJM4A
Lead Free Status / RoHS Status
Compliant
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3.7.6.1
3.7.6.1.1
The following diagrams and tables specify the timings related to the SDRAMC module which interfaces
SDRAM.
Freescale Semiconductor
SD1
SD2
SD3
SD4
SD5
ID
SDCLK
SDCLK
ADDR
DQM
RAS
CAS
WE
DQ
CS
SDRAM clock high-level width
SDRAM clock low-level width
SDRAM clock cycle time
CS, RAS, CAS, WE, DQM, CKE setup time
CS, RAS, CAS, WE, DQM, CKE hold time
ESDCTL Electrical Specifications
SDRAM Memory Controller
SD4
SD6
SD4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
ROW/BA
Table 42. DDR/SDR SDRAM Read Cycle Timing Parameters
SD5
Figure 25. SDRAM Read Cycle Timing Diagram
SD5
SD7
Parameter
SD10
1
SD4
COL/BA
1
SD4
SD4
SD5
SD5
SD5
SD8
Note: CKE is high during the read/write cycle.
Data
SD1
SD9
SD3
SD2
Symbol
tCMH
tCMS
tCH
tCK
tCL
Min.
3.4
3.4
7.5
2.0
1.8
Max.
4.1
4.1
—
—
—
Unit
ns
ns
ns
ns
ns
57
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