PPC440GX-3RF667C Applied Micro Circuits Corporation, PPC440GX-3RF667C Datasheet - Page 73

• Manufacturer Part Number: PPC440GX-3RF667C
• Manufacturer: Applied Micro Circuits Corporation

Specifications of PPC440GX-3RF667C

• Family Name: 440GX
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 667MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.55/2.5V
• Operating Supply Voltage (max): 1.6/2.7V
• Operating Supply Voltage (min): 1.5/2.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 552
• Package Type: CBGA
• Lead Free Status / RoHS Status: Compliant

I/O Specifications—All Speeds
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for 133MHz and
3. The clock frequency for RMII operation is 50MHz ± 100ppm.
4. The clock frequency for SMII operation is 125MHz ± 100ppm.
5. These are DDR signals that can change on both the positive and negative clock transitions.
Revision 1.20 – June 9, 2009
AMCC
Ethernet RGMII Interface
GMC0RxClk
GMC0RxCtl
GMC0RxD0:3
GMC0TxClk
GMC0TxCtl
GMC0TxD0:3
GMC1RxClk
GMC1RxCtl
GMC1RxD0:3
GMC1TxClk
GMC1TxCtl
GMC1TxD0:3
GMCRefClk
Ethernet TBI Interface
TBIRxClk0
TBIRxClk1
TBIRxD0:9
TBITxClk
TBITxD0:9
1.7ns for 66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66MHz. PCI output hold time
requirement is 1ns for 66MHz and 2ns for 33MHz.
Data Sheet
Signal
Setup Time
(T
IS
2.5
na
na
na
na
na
na
na
na
na
na
na
na
na
1
1
1
1
min)
Input (ns)
Hold Time
(T
IH
1.5
na
na
na
na
na
na
na
na
na
na
na
na
na
1
1
1
1
min)
(Sheet 4 of 7)
Valid Delay
(T
OV
0.5
0.5
0.5
0.5
na
na
na
na
na
na
na
na
na
na
na
na
na
6
max)
Output (ns)
440GX – Power PC 440GX Embedded Processor
Hold Time
(T
OH
3.5
3.5
3.5
3.5
na
na
na
na
na
na
na
na
na
na
na
na
na
1
min)
(minimum)
Output Current (mA)
I/O H
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
na
na
na
na
na
na
na
na
(minimum)
I/O L
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
na
na
na
na
na
na
na
na
GMC0RxClk
GMC0RxClk
GMC1RxClk
GMC1RxClk
GMC0TxClk
GMC0TxClk
GMC1TxClk
GMC1TxClk
TBIRxClkx
TBITxClk
Clock
Notes
async
async
async
async
async
async
async
async
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
1,
1,
1,
1,
1,
1,
1,
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