PPC440EPX-SUA667T Applied Micro Circuits Corporation, PPC440EPX-SUA667T Datasheet - Page 79

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PPC440EPX-SUA667T

Manufacturer Part Number
PPC440EPX-SUA667T
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of PPC440EPX-SUA667T

Family Name
440EPx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
667MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5/3.3V
Operating Supply Voltage (max)
1.6/3.45V
Operating Supply Voltage (min)
1.425/3.15V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
680
Package Type
TEBGA
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PPC440EPX-SUA667T
Manufacturer:
FUJITSU
Quantity:
143
Revision 1.30 – February 27, 2009
Table 21. I/O Specifications—PCI, USB, UART, IIC, SPI, Ethernet, System and Debug Interfaces (Sheet 1 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. SMIISync is a weak driver. Redrive SMIISync when driving more than one load.
3. TDO timing is referenced to the falling edge of TCK.
AMCC Proprietary
PCI Interface
PCIAD31:00
PCIC3:0/BE3:0
PCIDevSel
PCIFrame
PCIGnt0:5
PCIIDSel
PCIINT
PCIIRDY
PCIPar
PCIPErr
PCIReq0:5
PCIReset
PCISErr
PCIStop
PCITRDY
Ethernet MII Interface
GMCCD
GMCCrS
GMCMDClk
GMCMDIO
GMCRxClk
GMCRxD0:3
GMCTxD0:3
GMCRxDV
GMCRxEr
GMCTxClk
GMCTxEr
GMCTxEn
Ethernet GMII Interface
GMCCD
GMCCrS
GMCGTxClk
GMCMDClk
GMCMDIO
GMCRxClk
GMCRxD0:3
GMCTxD0:3
GMCRxDV
GMCRxEr
GMCTxEr
GMCTxEn
Data Sheet
Signal
Setup Time
(T
IS
10
10
10
3
3
5
5
5
5
5
5
5
5
5
5
2
2
2
min)
Input (ns)
Hold Time
(T
IH
10
10
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
min)
Valid Delay
(T
OV
2.5
2.5
2.5
10
10
10
6
6
6
6
6
6
6
6
6
6
6
max)
Output (ns)
Hold Time
440EPx – PPC440EPx Embedded Processor
(T
OH
2
2
1
1
2
2
2
2
2
2
2
2
2
1
1
1
1
min)
(minimum)
Output Current (mA)
I/O H
0.5
0.5
0.5
0.5
0.5
n/a
0.5
0.5
0.5
0.5
n/a
n/a
0.5
0.5
0.5
5.1
5.1
5.1
5.1
n/a
5.1
5.1
5.1
n/a
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
(minimum)
I/O L
1.5
1.5
1.5
1.5
1.5
n/a
1.5
1.5
1.5
1.5
n/a
n/a
1.5
1.5
1.5
6.8
6.8
6.8
6.8
n/a
6.8
6.8
6.8
6.8
n/a
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
GMCGTxClk
GMCGTxClk
GMCGTxClk
GMCMDClk
GMCMDClk
GMCRxClk
GMCTxClk
GMCRxClk
GMCRxClk
GMCTxClk
GMCTxClk
GMCRxClk
GMCRxClk
GMCRxClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
Clock
Notes
async
async
async
async
async
async
1
1
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