PPC440EPX-NPAFFFTS AMCC [Applied Micro Circuits Corporation], PPC440EPX-NPAFFFTS Datasheet

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PPC440EPX-NPAFFFTS

Manufacturer Part Number
PPC440EPX-NPAFFFTS
Description
PowerPC 440EPx Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
Features
Description
Designed specifically to address high-end embedded
applications, the PowerPC 440EPx (PPC440EPx)
provides a high-performance, low-power solution that
interfaces to a wide range of peripherals and
incorporates on-chip power management features.
This chip contains a high-performance RISC
processor, on-chip SRAM, a floating point unit,
DDR2/1 SDRAM controller, PCI bus interface, control
for external ROM and peripherals, DMA with
scatter/gather support, Ethernet ports, serial ports, IIC
interfaces, SPI interface, USB ports, NAND Flash
interface, an optional security feature
AMCC Proprietary
440EPx
PowerPC 440EPx Embedded Processor
• PowerPC
• 16 KB of on-chip SRAM.
• Selectable processor:bus clock ratios of N:1, N:2.
• Floating Point Unit with single- and double-
• Dual bridged Processor Local Buses (PLBs) with
• Double Data Rate 2/1 (DDR2/1) Synchronous
• DMA support for external peripherals, internal
• Programmable Interrupt Controller supports
• Programmable General Purpose Timers (GPT).
• PCI V2.2 interface (3.3 V only). Thirty-two bits at
• Two Ethernet 10/100/1000 Mbps half- or full-
667 MHz with 32 KB I-cache and D-cache with
parity checking.
precision and single-cycle throughput.
64- and 128-bit widths.
DRAM (SDRAM) interface operating up to
166 MHz (333 MHz data transfer rate) with
optional ECC.
UART and memory.
interrupts from a variety of sources.
up to 66 MHz.
®
440 processor operating up to
(PPC440EPx-S), and general purpose I/O.
Technology: CMOS Cu-11, 0.13 μm.
Package: 35 mm, 680-ball thermally enhanced plastic
ball grid array (TE-EPBGA). RoHS compliant package
available.
Typical power: Less than 3 W at 533 MHz.
Supply voltages required: 3.3 V, 2.5 V, 1.8 V (DDR2) or
2.5 V (DDR1), 1.5 V.
• Up to four serial ports (16750 compatible UART).
• One USB 2.0 Device or Host interface with
• External peripheral bus (32-bit data) for up to six
• Two IIC interfaces (one with boot parameter read
• NAND Flash interface.
• SPI interface.
• General Purpose I/O (GPIO) interface.
• JTAG interface for board level testing.
• Boot from PCI memory, NOR Flash on the
• Optional security feature (PPC440EPx-S).
• Available in RoHS compliant, lead-free package.
duplex interfaces. Operational modes supported
are with packet reject, Jumbo frames, and
interrupt coalescing.
internal PHY and one USB 2.0 direct Device UTMI
interface.
devices with external mastering.
capability).
external peripheral bus, or NAND Flash on the
NAND Flash interface.
Revision 1.26 – October 15, 2007
Preliminary Data Sheet
Part Number 440EPx
1

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