MC9S08QG8CDTER Freescale, MC9S08QG8CDTER Datasheet - Page 13

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MC9S08QG8CDTER

Manufacturer Part Number
MC9S08QG8CDTER
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08QG8CDTER

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
8KB
Lead Free Status / RoHS Status
Compliant

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Section Number
6.1
6.2
6.3
6.4
7.1
7.2
7.3
7.4
7.5
8.1
Freescale Semiconductor
Port Data and Data Direction .......................................................................................................... 77
Pin Control — Pullup, Slew Rate, and Drive Strength ................................................................... 78
Pin Behavior in Stop Modes............................................................................................................ 79
Parallel I/O Registers ...................................................................................................................... 79
Introduction ..................................................................................................................................... 87
Programmer’s Model and CPU Registers ....................................................................................... 88
Addressing Modes........................................................................................................................... 91
Special Operations........................................................................................................................... 93
HCS08 Instruction Set Summary .................................................................................................... 96
Introduction ................................................................................................................................... 107
6.4.1 Port A Registers .................................................................................................................79
6.4.2 Port A Control Registers....................................................................................................80
6.4.3 Port B Registers .................................................................................................................83
6.4.4 Port B Control Registers ....................................................................................................84
7.1.1 Features ..............................................................................................................................87
7.2.1 Accumulator (A) ................................................................................................................88
7.2.2 Index Register (H:X) .........................................................................................................88
7.2.3 Stack Pointer (SP) ..............................................................................................................89
7.2.4 Program Counter (PC) .......................................................................................................89
7.2.5 Condition Code Register (CCR) ........................................................................................89
7.3.1 Inherent Addressing Mode (INH)......................................................................................91
7.3.2 Relative Addressing Mode (REL) .....................................................................................91
7.3.3 Immediate Addressing Mode (IMM).................................................................................91
7.3.4 Direct Addressing Mode (DIR) .........................................................................................91
7.3.5 Extended Addressing Mode (EXT) ...................................................................................92
7.3.6 Indexed Addressing Mode .................................................................................................92
7.4.1 Reset Sequence ..................................................................................................................93
7.4.2 Interrupt Sequence .............................................................................................................93
7.4.3 Wait Mode Operation.........................................................................................................94
7.4.4 Stop Mode Operation.........................................................................................................94
7.4.5 BGND Instruction..............................................................................................................95
8.1.1 ACMP Configuration Information...................................................................................107
8.1.2 ACMP/TPM Configuration Information .........................................................................107
8.1.3 Features ............................................................................................................................109
Central Processor Unit (S08CPUV2)
Analog Comparator (S08ACMPV2)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Parallel Input/Output Control
Chapter 6
Chapter 7
Chapter 8
Title
Page
11

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