MC9S08QG8CDTER Freescale, MC9S08QG8CDTER Datasheet - Page 111

• Manufacturer Part Number: MC9S08QG8CDTER
• Manufacturer: Freescale

Specifications of MC9S08QG8CDTER

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Lead Free Status / RoHS Status: Compliant

8.1.3
The ACMP has the following features:
8.1.4
This section defines the ACMP operation in wait, stop, and background debug modes.
8.1.4.1
The ACMP continues to run in wait mode if enabled before executing the WAIT instruction. Therefore,
the ACMP can be used to bring the MCU out of wait mode if the ACMP interrupt, ACIE, is enabled. For
lowest possible current consumption, the ACMP should be disabled by software if not required as an
interrupt source during wait mode.
8.1.4.2
The ACMP is disabled in all stop modes, regardless of the settings before executing the STOP instruction.
Therefore, the ACMP cannot be used as a wake up source from stop modes.
During either stop1 or stop2 mode, the ACMP module will be fully powered down. Upon wake-up from
stop1 or stop2 mode, the ACMP module will be in the reset state.
During stop3 mode, clocks to the ACMP module are halted. No registers are affected. In addition, the
ACMP comparator circuit will enter a low power state. No compare operation will occur while in stop3.
If stop3 is exited with a reset, the ACMP will be put into its reset state. If stop3 is exited with an interrupt,
the ACMP continues from the state it was in when stop3 was entered.
8.1.4.3
When the microcontroller is in active background mode, the ACMP will continue to operate normally.
8.1.5
The block diagram for the analog comparator module is shown
Freescale Semiconductor
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Full rail-to-rail supply operation.
Less than 40 mV of input offset.
Less than 15 mV of hysteresis.
Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator
output.
Option to compare to fixed internal bandgap reference voltage.
Option to allow comparator output to be visible on a pin, ACMPO.
Features
Modes of Operation
Block Diagram
ACMP in Wait Mode
ACMP in Stop Modes
ACMP in Active Background Mode
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure
8-2.
Analog Comparator (S08ACMPV2)
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