PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 113

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PSD813F2-A-70J

Manufacturer Part Number
PSD813F2-A-70J
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD813F2-A-70J

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Compliant
PSD8XXFX
Table 65.
1. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
2. Data stable on ADIO pins to data on port A.
Figure 48. Reset (RESET) timing
Table 66.
1. Reset (RESET) does not reset Flash memory program or erase cycles.
2. Warm reset aborts Flash memory program or erase cycles, and puts the device in READ mode.
Table 67.
1. Reset (RESET) does not reset Flash memory program or erase cycles.
2. Warm reset aborts Flash memory program or erase cycles, and puts the device in READ mode.
t
t
t
t
t
t
t
t
t
t
t
WLQV–PA
DVQV–PA
WHQZ–PA
NLNH
NLNH–PO
NLNH–A
OPR
NLNH
NLNH–PO
NLNH–A
OPR
Symbol
Symbol
Symbol
V
RESET
CC
Port A Peripheral Data mode WRITE timing (3 V devices)
Reset (RESET) timing (5 V devices)
Reset (RESET) timing (3 V devices)
WR to data propagation delay
Data to port A data propagation delay
WR invalid to port A tri-state
RESET active low time
Power-on Reset active low time
Warm Reset (on the PSD834Fx)
RESET high to operational device
RESET active low time
Power-on Reset active low time
Warm Reset (on the PSD834Fx)
RESET high to operational device
Power-On Reset
V
t NLNH-PO
CC
Parameter
(min)
Parameter
Parameter
(1)
(1)
(2)
(2)
t OPR
Doc ID 7833 Rev 7
Conditions
(1)
(2)
(1)
Conditions
Conditions
Min Max Min Max Min Max
-12
42
38
33
Warm Reset
t NLNH-A
Min
Min
t NLNH
150
300
25
25
1
1
-15
45
40
33
AC/DC parameters
Max
Max
120
300
t OPR
-20
AI02866b
55
45
35
113/128
Unit
Unit
Unit
ms
ms
ns
ns
ns
ns
µs
ns
ns
µs
ns

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