ISP1160BM01TM STEricsson, ISP1160BM01TM Datasheet - Page 71

• Manufacturer Part Number: ISP1160BM01TM
• Manufacturer: STEricsson

Specifications of ISP1160BM01TM

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
13. Power-on reset (POR)
9397 750 13963
Product data
When V
will be typically (600 ns to 1000 ns)
how fast V
external power supply circuit.
To give a better view of the functionality,
V
internal POR pulse will not react and will remain LOW. The internal POR starts with a
1 at t0. At t1, the detector will see the passing of the trip level and a delay element will
add another t
The internal POR pulse will be generated whenever V
more than 11 s.
Even if V
and on-chip voltage regulator ensure that 3.3 V is going to the internal POR circuitry
by clipping the voltage above 3.3 V.
The RESET_N pin can be either connected to V
externally controlled (by the microprocessor, ASIC, and so on).
availability of the clock with respect to the external POR.
Fig 33. Internal POR timing.
Fig 34. Clock with respect to the external POR.
CC(POR)
t0
(1) PORP = power-on reset pulse.
Stable external clock is available at A.
CC
CC
with dips at t2-t3 and t4-t5. If the dip at t4-t5 is too short (that is, <11 s), the
CC
t1
is directly connected to the RESET_N pin, the internal pulse width (t
t
is 5.0 V, V
PORP
PORP
is rising with respect to V
Rev. 05 — 24 December 2004
before it drops to 0.
EXTERNAL CLOCK
trip
still remains at 2.03 V. This is because the 5 V tolerant pads
POR
t2
X, when V
trip
Figure 33
(2.03 V). The time X is decided by the
t3
t
PORP
CC
CC
A
shows a possible curve of
Embedded USB Host Controller
(using the internal POR circuit) or
is 3.3 V. The time X depends on
CC(POR)
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
t4
004aaa365
t5
drops below V
Figure 34
004aaa389
ISP1160
PORP (1)
V BAT(POR)
V trip
shows the
trip
70 of 88
PORP
for
)