SCD128410QCE Intel, SCD128410QCE Datasheet - Page 150

• Manufacturer Part Number: SCD128410QCE
• Manufacturer: Intel

Specifications of SCD128410QCE

• Pin Count: 100
• Lead Free Status / RoHS Status: Not Compliant

CD1284 — IEEE 1284-Compatible Parallel Interface Controller
7.8.8
7.8.9
7.8.10
150
Register Name: OVR
Register Description: Output Value
Access: Write only
Register Name: PCIER
Register Description: Parallel Channel Interrupt Enable
Access: Read/Write
Register Name: PCISR
Register Description: Parallel Channel Interrupt Status
Access: Read/Write
PerBsy
Bit 7
Bit 7
Bit 7
0
0
Bit
7:6
2:0
5
4
3
Setting the bits in this register enables the CD1284 to generate an interrupt – if SigCh (PCIER[4])
is set – when the selected signal changes from low-to-high (rising edge). Bits 7:4 are reserved and
must be written as zeros; they return zero when read. The settings in this register have no effect
(that is, a SigCh interrupt is not generated) unless the device is in Manual mode.
Output Value Register
This register controls output signals. In Manual mode, all signals are controlled by these register
settings. In Compatibility and EPP modes, PerBsy and PerClk are controlled by the internal
parallel port state machine, while AkDaRq, xFlag, and nDatAv are controlled by this register. In
ECP mode, the settings in this register have no effect.
Parallel Channel Interrupt Enable Register
Parallel Channel Interrupt Status Register
Peripheral Busy and Peripheral Clock: User-controlled in Manual mode only.
Acknowledge Data Request: In Compatible mode, this signal is the PError (Peripheral Error) signal.
In EPP mode, this signal is auxiliary and is a user-defined signal (USER 1).
XFlag: In Compatible mode, this signal is the SELCT (Select) signal.
In EPP mode, this signal is auxiliary and is a user-defined signal (USER 2).
Negative-true Data Available: In Compatible mode, this signal is the nFault (negative-true fault) signal.
In EPP mode, this signal is auxiliary and is a user-defined signal (USER 3).
Reserved: These bits must be written as ‘0’.
TimOvr
PerClk
TimEn
Bit 6
Bit 6
Bit 6
AkDaRq
NegCh
NegCh
Bit 5
Bit 5
Bit 5
SigCh
SigCh
xFlag
Bit 4
Bit 4
Bit 4
Description
EPPAW
EPPAW
nDatAv
Bit 3
Bit 3
Bit 3
Bit 21
DirCh
DirCh
Bit 2
Bit 2
0
IDReq
IDReq
Bit 1
Bit 1
8-Bit Hex Address: 2B
8-Bit Hex Address: 22
Bit
8-Bit Hex Address: 23
0
Default Value: 00
Default Value: 00
Default Value: 48
Datasheet
nINIT
nINIT
Bit 0
Bit 0
Bit
0