SCD128410QCE Intel, SCD128410QCE Datasheet - Page 121
SCD128410QCE
Manufacturer Part Number
SCD128410QCE
Description
Manufacturer
Intel
Datasheet
1.SCD128410QCE.pdf
(176 pages)
Specifications of SCD128410QCE
Pin Count
100
Lead Free Status / RoHS Status
Not Compliant
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Part Number:
SCD128410QCE
Manufacturer:
INTEL
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7.3.1.4
Datasheet
Bit 7
0
Bit
4:3
2:0
5
Format 4 — Channel Control Command
This command activates or deactivates the serial transmitter and/or receiver of the selected
channel, based on the values in bits 3 through 0. This command is issued when a channel is being
started for the first time. Once a channel is in use, it can be started and stopped using this
command. It is more efficient however, to use the appropriate SRER bit in the IER. Multiple
control commands can be issued at the same time; for example, both the transmitter and receiver
can be enabled by simultaneously setting both the XMT EN and RCV EN bits.
Issuing an enable/disable command does not affect any register programming of the selected
channel. It does however, affect the state of transmit flow-control. Issuing a disable or enable
command to a channel whose transmitter has been flow-controlled by a remote (see the TxIBE bit
in COR2), restarts transmission and clears the TxFloff bit (CCSR[2]). This ability is provided so
that the host can override remote-generated flow control.
Description
Must be ‘1’.
Must be ‘0’.
These bits are encoded as:
Bit 6
0
SSPC2
0
0
0
0
1
1
1
1
Bit 5
0
SSPC1
IEEE 1284-Compatible Parallel Interface Controller — CD1284
0
0
1
1
0
0
1
1
Chan Ctl
Bit 4
SSPC0
0
1
0
1
0
1
0
1
XMT EN
Bit 3
Not used.
Send special character 1.
Send special character 2.
Send special character 3.
Send special character 4.
Not used.
XMT DIS
Bit 2
Encoding
RCV EN
Bit 1
RCV DIS
Bit 0
121
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