FW82801E S L5AW Intel, FW82801E S L5AW Datasheet - Page 78
FW82801E S L5AW
Manufacturer Part Number
FW82801E S L5AW
Description
Manufacturer
Intel
Datasheet
1.FW82801E_S_L5AW.pdf
(84 pages)
Specifications of FW82801E S L5AW
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Intel
5.2
5.3
78
Figure 30. Example XOR Chain Circuitry
®
82801E C-ICH
Tri-state Mode
When in the tri-state mode, all outputs and bidirectional pin are tri-stated, including the XOR
Chain outputs.
XOR Chain Mode
In the 82801E C-ICH, provisions for Automated Test Equipment (ATE) board level testing are
implemented with XOR Chains. The 82801E C-ICH signals are grouped into four independent
XOR chains which are enabled individually. When an XOR chain is enabled, all output and
bidirectional buffers within that chain are tri-stated, except for the XOR chain output. Every signal
in the enabled XOR chain (except for the XOR chain’s output) functions as an input. All output and
bidirectional buffers for pins not in the selected XOR chain are tri-stated. Figure 30 is a schematic
example of XOR chain circuitry.
Table 57 - Table 60 list each XOR chain pin ordering, with the first value being the first input and
the last value being the XOR chain output. Table 61 lists the signal pins not included in any XOR
chain.
Vcc
Input
Pin 1
Input
Pin 2
Input
Pin 3
Input
Pin 4
Input
Pin 5
Advance Information Datasheet
Input
Pin 6
Output
Chain
XOR
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