FW82801E S L5AW Intel, FW82801E S L5AW Datasheet - Page 77
FW82801E S L5AW
Manufacturer Part Number
FW82801E S L5AW
Description
Manufacturer
Intel
Datasheet
1.FW82801E_S_L5AW.pdf
(84 pages)
Specifications of FW82801E S L5AW
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5.1
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Advance Information Datasheet
Table 56. Test Mode Selection
Figure 29. Test Mode Entry (XOR Chain Example)
Note: RTCRST# can be driven low any time after PCIRST# is inactive.
Testability
Test Mode Description
The 82801E C-ICH supports two types of test modes, a tri-state test mode and an XOR Chain test
mode. Driving RTCRST# low for a specific number of PCI clocks while PWROK is high activates
a particular test mode as described in Table 56.
Figure 29 illustrates the entry into a test mode. A particular test mode is entered upon the rising
edge of the RTCRST# after being asserted for a specific number of PCI clocks while PWROK is
active. To change test modes, the same sequence should be followed again. To restore the 82801E
C-ICH to normal operation, execute the sequence with RTCRST# being asserted so that no test
mode is selected as specified in Table 56.
Number of PCI Clocks RTCRST# Driven Low After
Other Signal
RSMRST#
RTCRST#
PWROK
Outputs
PWROK Active
9 - 24
>24
<4
4
5
6
7
8
All Output Signals Tri-Stated
N Number of PCI Clocks
Reserved. DO NOT ATTEMPT
No Test Mode Selected
No Test Mode Selected
XOR Chain 1
XOR Chain 2
XOR Chain 3
XOR Chain 4
Test Mode
XOR Chain Output Enabled
All “Z”
Test Mode Entered
Intel
®
82801E C-ICH
77
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