FDC37M707-MS Standard Microsystems (SMSC), FDC37M707-MS Datasheet - Page 153

• Manufacturer Part Number: FDC37M707-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37M707-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

PME Wake Enable
Default = 0x00 on
V
TR
POR
NAME
REG INDEX
(R/W)
0xC8
This register is used to enable individual
FDC37M70x PME wake sources onto the nPME
wake bus.
When the PME Wake Enable register bit for a wake
source is active (“1”), if the source asserts a wake
event and the PME_En bit is “1”, the source will
assert the PCI nPME signal.
When the PME Wake Enable register bit for a wake
source is inactive (“0”), the PME Wake Status
register will indicate the state of the wake source but
will not assert the PCI nPME signal.
Bit[0] Reserved
Bit[1] RI2
Bit[2] RI1
Bit[3] KBD
Bit[4] MOUSE
Bit[7:5] Reserved
The PME Wake Enable register is not affected by
Vcc POR, SOFT RESET or HARD RESET.
153
DEFINITION
STATE