FDC37M707-MS Standard Microsystems (SMSC), FDC37M707-MS Datasheet - Page 131
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FDC37M707-MS
Manufacturer Part Number
FDC37M707-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37M707-MS.pdf
(194 pages)
Specifications of FDC37M707-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
- Current page: 131 of 194
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INDEX
0x60,
0x2C
0x2D
0x2B
0x2E
0x2F
0xF0
0xF1
0x02
0x03
0x07
0x20
0x21
0x22
0x23
0x24
0x26
0x27
0x30
0x61
0x70
0x74
2. SOFT RESET: Bit 0 of Configuration Control register set to one
3. All host accesses are blocked for 500µs after Vcc POR (see Power-up Timing
Diagram)
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R
Table 52 – FDC37M70x Configuration Registers Summary
LOGICAL DEVICE 0 CONFIGURATION REGISTERS (FDD)
=0: 0xF0
=1: 0x70
=0: 0x03
=1: 0x03
RESET
HARD
Sysop
Sysop
Sysop
Sysop
0x03,
0x0E
0x00
0x03
0x00
0x00
0x00
0x04
0x00
0xF0
0x06
0x02
0x00
-
-
-
-
-
GLOBAL CONFIGURATION REGISTERS
=0: 0xF0
=1: 0x70
=0: 0x03
=1: 0x03
Sysop
Sysop
Sysop
Sysop
Current Revision
0x03,
0x0E
POR
0x00
0x03
0x00
0x00
0x00
0x04
0x00
0x00
0x00
0x00
0x00
0x00
0xF0
0x06
0x02
0x00
VCC
0x42
RESET
SOFT
0x03,
0x00
0x00
0x00
0xF0
0x06
0x02
-
-
-
-
-
-
-
-
-
-
-
-
-
131
0x03,
0xF0
0x0E
POR
0x00
0x03
0x00
0x00
0x00
0x04
0x00
0x00
0x00
0x00
0x00
0x00
0x06
0x02
0x00
VTR
-
-
Configuration Control
Index Address
Logical Device Number
Device ID - hard wired
Device Rev - hard wired
Power Control
Power Mgmt
OSC
Configuration Port Address Byte 0
Configuration Port Address Byte 1
TEST 4
TEST 5
TEST 1
TEST 2
TEST 3
Activate
Primary Base I/O Address
Primary Interrupt Select
DMA Channel Select
FDD Mode Register
FDD Option Register
CONFIGURATION REGISTER
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