RD38F2240WWZDQ1 Micron Technology Inc, RD38F2240WWZDQ1 Datasheet - Page 7

• Manufacturer Part Number: RD38F2240WWZDQ1
• Manufacturer: Micron Technology Inc

Specifications of RD38F2240WWZDQ1

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

128-Mbit W18 Family with Synchronous PSRAM
1.2
1.3
November 2007
Order Number: 311760-10
APS
EFA
BCR
Buffered EFP
CR
CSP
MLC
OTP
PLR
PR
RCR
RFU
RWW / RWE
SR
WSM
A5
Clear
DQ[15:0]
F-CE#
P-CE# or P-CS#
S-CS1#
Set
SR4
VCC
V
VSS
CC
Acronyms
Conventions
Automatic Power Savings
Extended Flash Array
(PSRAM) Bus Control Register
Buffered Enhanced Factory Programming
(Flash) Configuration Register
Chip Scale Package
Multi-Level Cell
One-Time Programmable
Protection Lock Register
Protection Register
(PSRAM) Refresh Control Register
Reserved for Future Use
Read-While-Write / Read-While-Erase
Status Register
Write State Machine
Denotes one element of a signal group, in this case address bit 5.
Logical zero (0).
Denotes a group of similarly named signals, such as data bus.
Denotes Chip Enable of the flash die, where “F” to denote the specific signal
suffix and “CE#” is the root signal name of the NOR flash die.
Denotes Chip Enable of the PSRAM die, where “P” to denote the specific signal
suffix and “CE# or CS#” are the root signal name of the PSRAM die. PSRAM
CE# and CS# is used interchangably throughout the document.
Denotes Chip Enable of the SRAM die, where “S” to denote the specific signal
suffix and “CS1#” is the root signal name of the SRAM die.
Logical one (1).
A flash status register bit, in this case status register bit 4 of SR[15:0].
Signal or voltage connection.
Signal or voltage level.
Denotes a global power signal of the stacked device. VSS is common to all
memory dies within a stacked memory device.
Datasheet
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