RD38F2240WWZDQ1 Micron Technology Inc, RD38F2240WWZDQ1 Datasheet - Page 27

• Manufacturer Part Number: RD38F2240WWZDQ1
• Manufacturer: Micron Technology Inc

Specifications of RD38F2240WWZDQ1

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

128-Mbit W18 Family with Synchronous PSRAM
Table 13: PSRAM AC Characteristics—Synchronous Read and Write
Notes:
1.
2.
3.
4.
5.
November 2007
Order Number: 311760-10
Symbol
t
t
t
t
t
t
ASKEW
f
f
t
t
t
t
t
t
t
t
AADV
t
CLK2
CLK6
CLK2
CLK6
CBPH
t
t
t
ACLK
t
t
t
t
t
CWT
KOH
CKH
CKL
ABA
AVH
CSS
AOE
CSL
t
WZ
WK
AA
CO
HD
OD
SP
OL
T
In case of refresh collisions with the first access, more WAIT cycles will be added.
t
The purpose of the Max limit is to prevent the PSRAM from starting Async access cycle.
To allow for proper refresh operation, the CE# must be high during a clock low to high transition or keep CE# high for min
15 ns.
Address Skew maximum must not be exceeded during synchronous operations to avoid inadvertent asynchronous
operation
SP
Max values only applies to ADV#.
CLK Frequency (Variable Latency = 2) Non-Mux and AD Mux
CLK Frequency (Fixed Latency = 6) Non Mux and AD Mux
CLK Period (Variable Latency = 2) Non Mux
CLK Period (Fixed Latency = 6)
CLK High Time
CLK Low Time
CLK Rise/Fall Time
Burst Read First Access Delay (Variable Latency = 2)
Address Access Time (Fixed Latency)
ADV# Access Time (Fixed Latency)
CE# Access Time (Fixed Latency)
Address Hold from ADV# High (Fixed Latency)
Input Setup to CLK High (except CE#)
Input Hold from CLK High
CE# Low Setup to CLK High
CE# Pulse Width Low Time
CE# Pulse Width High Time Between Operations
OE# or UB#/LB# Low to Output Low-Z
CE#, OE#, or UB#/LB# High to Output in High-Z
OE# Low to Output Delay
CE# Low to WAIT Valid
CE# High to WAIT High-Z
CLK to WAIT Valid
CLK to Output Delay
Output Hold from CLK
Address Skew
Parameter
18.5
18.5
Min
4.5
—
—
—
—
—
—
—
—
—
—
—
—
—
0
4
4
5
3
2
6
3
1
2
Max
47.5
1.8
7.5
66
66
70
70
70
20
20
20
10
—
—
—
—
—
—
—
—
—
4
8
8
9
9
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
Datasheet
Notes
1
2
3
4
5
5
27