RD38F2240WWZDQ1 Micron Technology Inc, RD38F2240WWZDQ1 Datasheet - Page 10

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RD38F2240WWZDQ1

Manufacturer Part Number
RD38F2240WWZDQ1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of RD38F2240WWZDQ1

Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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Quantity
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Part Number:
RD38F2240WWZDQ1
Manufacturer:
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Part Number:
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Quantity:
20 000
2.3
2.3.1
Note:
Table 2:
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Datasheet
10
Synchronous
Array and Non-
Array Read
Asynchronous
Read
Write
Output Disable
Standby
Reset
Read
Write
Output Disable
Standby
Low Power
Mode
For flash, do not simultaneously assert F-OE# and F-WE#. For PSRAM, do not simultaneously assert
R-OE# and R-WE#.
X can be V
Refer to the latest revision of the Intel
Non-Mux I/O doc #290701 and ADMux I/O doc #313272) for valid D
Flash CFI query and Status Register accesses, use DQ[7:0] only. All other reads use DQ[15:0].
P-CRE# is low if PSRAM is in standby. P-CRE# is X if PSRAM is in Low-Power mode. See
Operations” on page 37
WAIT indicates data validity only when in Synchronous mode. Ignore this setting in Asynchronous and Page-mode.
The Flash and Synchronous PSRAM dies share the WAIT signal.
During AD-Mux I/O operation, ADV# must remain deasserted during the data phase.
Mode
Flash and PSRAM Device Bus Operations
Device Operation Overview
The following sections describes the bus operations and device state between the flash
and synchronous PSRAM.
Flash and Synchronous PSRAM Bus Operations
Bus operations for the W18 stacked device involve the control of flash and PRAM inputs.
The bus operations are shown in
See the Intel
Mux I/O doc #290701 and ADMux I/O doc #313272) for complete descriptions of the
flash modes and commands, command bus-cycle definitions, and flowcharts that
illustrate operational routines not documented in this Datasheet.
IL
or V
IH
H
H
H
H
H
X
X
L
for flash or xRAM inputs; V
Any Flash mode allowed
H
H
H
L
L
L
L
X
®
H
H
X
X
X
X
L
L
Wireless Flash Memory (W18) Discrete Datasheet (order number: Non-
for more details about Standby and Low Power mode.
H
H
H
L
X
X
X
X
®
X
X
X
X
X
X
L
L
Wireless Flash Memory (W18) Datasheet (order number:
V
V
PPL
PPLK
PPH
X
X
X
X
X
X
X
or
, V
Table
PPL
Any PSRAM mode allowed
X
X
X
X
L
L
L
L
,or V
2.
PPH
H
H
H
H
X
L
L
L
for F-VPP.
H
H
X
X
X
X
X
L
128-Mbit W18 Family with Synchronous PSRAM
IN
during Flash writes.
H
H
X
X
X
X
X
L
X
X
X
X
X
X
L
L
DQ[15:0]
PSRAM D
Flash D
Flash D
Flash D
PSRAM
PSRAM
PSRAM
PSRAM
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Flash
Flash
Flash
D
Section 9.0, “Device
OUT
OUT
OUT
IN
IN
Order Number: 311760-10
Deasserted
Deasserted
WAIT
PSRAM
PSRAM
PSRAM
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Active
Active
Active
Flash
Flash
Flash
November 2007
7
Notes
1,2,4
1,2,4
1,2,3
1,2
1,2
1,2
1,2,5,7
1,2,5,7
1,2
1,2
1,2

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