STAC9766XXTAEC1X IDT, Integrated Device Technology Inc, STAC9766XXTAEC1X Datasheet - Page 16

• Manufacturer Part Number: STAC9766XXTAEC1X
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of STAC9766XXTAEC1X

• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135/4.75V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: TQFP
• Lead Free Status / RoHS Status: Compliant

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
2.2.7.
2.2.8.
AC-Link Low Power Mode Timing
ATE Test Mode
BIT_CLK rise time
BIT_CLK fall time
SDATA_IN rise time
SDATA_IN fall time
Setup to trailing edge of RESET# (also applies to SYNC)
Rising edge of RESET# to Hi-Z delay
End of Slot 2 to BIT_CLK, SDATA_IN low
S D A T A _ I N , B I T _ C L K
Note: 1) All AC-Link signals are normally low through the trailing edge of RESET#. Bringing
SDATA_OUT high for the trailing edge of RESET# causes the STAC9766/9767 AC-Link outputs to
go high-impedance, which is suitable for ATE in-circuit testing.
Note: 2) Once the test mode has been entered, the STAC9766/9767 must be issued another
RESET# with all AC-Link signals low to return to the normal operating mode.
Note: 3) # denotes active low.
S D A T A _ O U T
S D A T A _ I N
S D A T A _ O U T
B I T _ C L K
S Y N C
R E S E T #
Figure 7. AC-Link Low Power Mode Timing
Parameter
Parameter
Figure 8. ATE Test Mode Timing
Parameter
N o t e : B I T _ C L K n o t t o s c a l e
W r i t e t o
S l o t 1
0 x 2 0
Toff
16
D a t a P R 4
S l o t 2
T s e t u p 2 r s t
Ts2_pdown
Tsetup2rst
Symbol
Symbol
Toff
Symbol
Trisedin
Triseclk
Tfalldin
Tfallclk
D o n ' t c a r e
STAC9766/9767
T s 2 _ p d o w n
H i - Z
15.0
Min
Min
-
-
Min
-
-
-
-
Typ
Typ
-
-
-
Typ
-
-
-
-
Max
Max
25.0
1.0
Max
-
6
6
6
6
PC AUDIO
V 7.4 12/06
Units
Units
Units
ns
ns
ns
ns
ns
ns
s