STAC9750XXTAEC1X IDT, Integrated Device Technology Inc, STAC9750XXTAEC1X Datasheet - Page 50

• Manufacturer Part Number: STAC9750XXTAEC1X
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of STAC9750XXTAEC1X

• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: TQFP
• Lead Free Status / RoHS Status: Compliant

IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
6.5.23.
Bit(s)
15:2
1
0
D15
D7
Digital Audio Control (6Ah)
Default: 0000h
This read/write register is used to program the digital mixer input status. In the default state, the PCM
DAC path is enabled and the ADC record inputs are disabled.
The DO1 and DO0 bits control the input source for the PCM to digital output converters. The table
describes the available options.
Read / Write
Read / Write
Read Only
Bit(s)
15:2
Access
1
0
D14
Reset
D6
Reset Value
0
0
0
0
x
x
D13
D5
Reserved
Reserved Bit not used, should read back 0
Name
DO1
DO0
Name
Reserved
GI1
GI0
Table 34. GPIO Pin Status Register
Table 35. Digital Audio Control Register
When GPIO1 is configured as output and Register 74h bit[0] = 0
(default), the value of this register will be placed on the GPIO1 pad.
When GPIO1 is configured as output and Register 74h bit[0] =1, the
GPIO1 pad will get its value from slot12.
When GPIO1 is configured as input and configured as a sticky writing
a 1 does nothing, writing a 0 clears this bit.
When GPIO1 is configured as input this register reflects the value on
the GPIO1 pad after interpretation of the polarity and sticky
configurations.
When GPIO0 is configured as output and Register 74h bit[0] = 0
(default), the value of this register will be placed on the GPIO0 pad.
When GPIO0 is configured as output and Register 74h bit[0] =1, the
GPIO0 pad will get its value from slot12.
When GPIO0 is configured as input and configured as a sticky writing
a 1 does nothing, writing a 0 clears this bit.
When GPIO0 is configured as input this register reflects the value on
the GPIO0 pad after interpretation of the polarity and sticky
configurations.
D12
50
D4
Bits not used, should read back 0
SPDIF Digital Output Source Selection:
DO1 = 0; PCM data from the AC-Link to SPDIF
DO1 = 1; ADC record data to SPDIF
Always reads zero
Reserved
D11
D3
Description
STAC9750/9751
D10
Description
D2
DO1
D9
D1
PC AUDIO
V 5.8 103106
DO0
D8
D0