SAA7103HV4 NXP Semiconductors, SAA7103HV4 Datasheet - Page 56
SAA7103HV4
Manufacturer Part Number
SAA7103HV4
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7103HV4.pdf
(84 pages)
Specifications of SAA7103HV4
Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
SAA7102_SAA7103_4
Product data sheet
Table 65:
Table 66:
Legend: * = default value after reset.
Table 67:
Legend: * = default value after reset.
Table 68:
Legend: * = default value after reset.
Table 69:
Legend: * = default value after reset.
Bit
7 to 3 CSYNCA[4:0] R/W
2 to 0 -
Bit
7 to 0 TTXOVS[7:0] R/W
Bit
7 to 0 TTXOVE[7:0] R/W
Bit
7 to 0 TTXEVS[7:0] R/W
Bit
7 to 0 TTXEVE[7:0] R/W
Symbol
Symbol
Symbol
Symbol
Symbol
CSYNC advance register, subaddress 75h, bit description
TTX odd request vertical start register, subaddress 76h, bit description
TTX odd request vertical end register, subaddress 77h, bit description
TTX even request vertical start register, subaddress 78h, bit description
TTX even request vertical end register, subaddress 79h, bit description
Access Value Description
Access Value Description
Access Value Description
Access Value Description
Access Value Description
R/W
Rev. 04 — 18 January 2006
04h*
05h*
16h*
10h*
05h*
06h*
16h*
10h*
-
000
with TTXEVS8 (see
signal TTXRQ on pin TTXRQ_XCLKO2 (CLK2EN = 0) in
even field, line = (TTXEVS + 4) for M-systems and
line = (TTXEVS + 1) for other systems
if strapped to PAL
if strapped to NTSC
with TTXEVE8 (see
signal TTXRQ on pin TTXRQ_XCLKO2 (CLK2EN = 0) in
even field, line = (TTXEVE + 3) for M-systems and
line = TTXEVE for other systems
if strapped to PAL
if strapped to NTSC
with TTXOVS8 (see
signal TTXRQ on pin TTXRQ_XCLKO2 (CLK2EN = 0) in
odd field, line = (TTXOVS + 4) for M-systems and
line = (TTXOVS + 1) for other systems
if strapped to PAL
if strapped to NTSC
with TTXOVE8 (see
signal TTXRQ on pin TTXRQ_XCLKO2 (CLK2EN = 0) in
odd field, line = (TTXOVE + 3) for M-systems and
line = TTXOVE for other systems
if strapped to PAL
if strapped to NTSC
advanced composite sync against RGB output from
0 XTAL clocks to 31 XTAL clocks
must be programmed with logic 0 to ensure compatibility
to future enhancements
SAA7102; SAA7103
Table
Table
Table
Table
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
72) first line of occurrence of
72) last line of occurrence of
72) first line of occurrence of
72) last line of occurrence of
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