STULPI01BTBR STMicroelectronics, STULPI01BTBR Datasheet - Page 32

• Manufacturer Part Number: STULPI01BTBR
• Manufacturer: STMicroelectronics

Specifications of STULPI01BTBR

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant

ULPI registers
Table 17.
Note:
32/44
Field name
XcvrSelect
TermSelect
OpMode
Reset
SuspendM
Reserved
Function control register
04h-06h(Read), 04h(Write), 05h(Set), 06h(Clear). These addresses control UTMI function
setting of the USB transceiver PHY.
Bits
1:0
4:3
2
5
6
7
rd/wr/s/c
rd/wr/s/c
rd/wr/s/c
rd/wr/s/c
rd/wr/s/c
rd/wr/s/c
Access
Doc ID 14817 Rev 3
Reset
01b
00b
0b
0b
0b
1b
Selects the required transceiver speed.
00b: Enable HS transceiver
01b: Enable FS transceiver
10b: Enable LS transceiver
11b: Enable FS transceiver for LS packets (FS preamble
is automatically pre-pended)
IMPORTANT NOTE: Every time the XcvrSelect is
changed to ‘00’, the output ULPI clock is stopped for the
time needed for internal DLL calibration.
Controls the internal pull-up resistors or HS terminations.
Control over these resistors changes depending on
XcvrSelect, OpMode, DpPulldown and DmPulldown, as
shown in
Selects the required bit encoding style during transmit.
00b: Normal operation
01b: Non-driving
10b: Disables bit-stuff and NRZI encoding
11b: Do not automatically add SYNC and EOP when
transmitting. Must be used only for HS packets.
Active high transceiver reset. After the Link sets this bit,
STULPI01 asserts DIR and reset the UTMI+ core. When
the reset is completed, STULPI01 de-asserts DIR and
automatically clears this bit. After de-asserting DIR,
STULPI01 re-asserts DIR and sends an RX CMD update
to the Link.
Note: If Reset bit is set to ‘1’ and SuspendM bit is set to ‘0’
in the same register access, SuspendM bit takes higher
priority and chip will enter low power mode. Reset bit will
be cleared.
Active low PHY suspend. Puts PHY into Low Power
Mode. STULPI01 automatically sets this bit to ‘1’ when
Low-Power Mode is exited.
0b: Low-Power Mode
1b: Powered
Note: If Reset bit is set to ‘1’ and SuspendM bit is set to ‘0’
in the same register access, SuspendM bit takes higher
priority and chip will enter low power mode. Reset bit will
be cleared.
Reserved
Table
24.
Description
STULPI01A - STULPI01B