STULPI01BTBR STMicroelectronics, STULPI01BTBR Datasheet
STULPI01BTBR
Specifications of STULPI01BTBR
Available stocks
Related parts for STULPI01BTBR
STULPI01BTBR Summary of contents
Page 1
Features ■ USB-IF high speed certified to the Universal Serial Bus specification rev 2.0 ■ Meets the requirements of the Universal Serial Bus specification revision 2.0, on-the-go supplement to the USB 2.0 specification 1.0a and ULPI transceiver specification 1.1 ■ ...
Page 2
Contents Contents 1 Application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
STULPI01A - STULPI01B 6.18.2 6.18.3 6.18.4 6.18.5 6.18.6 6.18.7 7 State transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
List of tables List of tables Table 1. Bill of materials - external components . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 5
STULPI01A - STULPI01B List of figures Figure 1. Peripheral only, configuration with external clock . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 6
Application diagrams 1 Application diagrams Figure 1. Peripheral only, configuration with external clock High-speed USB-OTG Controller GND Table 1. Bill of materials - external components Qty Symbol ...
Page 7
STULPI01A - STULPI01B 2 Bump configuration Figure 2. Pin connections µTFBGA36 (through top side view) Table 2. Pinout and bump description Bump Symbol Type ...
Page 8
Bump configuration Table 2. Pinout and bump description (continued VB_REF_FAULT D4 PSWn VBAT PWR E3 3V3V PWR 3.3 V LDO output. Bypass 3V3V to GND with a 1.5 µF capacitor. E6 1V2V ...
Page 9
STULPI01A - STULPI01B 3 Maximum ratings Table 3. Absolute maximum ratings Symbol V Digital I/O supply voltage DVIO V Digital core supply voltage (provided internally by LDO) 1V2 V Analog supply voltage (provided internally by LDO) 3V3 V Battery supply ...
Page 10
Electrical characteristics 4 Electrical characteristics Table 6. Electrical characteristics Symbol Parameter Power consumption I Supply current BAT ULPI bus supply current I DVIO V DVIO Logic inputs and outputs C ULPI port I/O capacitance ULPIIN High level output voltage V ...
Page 11
STULPI01A - STULPI01B Table 6. Electrical characteristics (continued) Symbol Parameter Low level input leakage cur rent High level input voltage V PDH (CSn/PWRDN pin) Low level input voltage V PDL (CSn/PWRDN pin) High level input leakage I PDH ...
Page 12
Electrical characteristics Table 6. Electrical characteristics (continued) Symbol Parameter Overcurrent detector Over current trip threshold V OC VB_REF_FAULT – VBUS pin pull-up current ID_PU ID line short resistance to R ID_GND detect ID GND state ID line ...
Page 13
STULPI01A - STULPI01B Table 6. Electrical characteristics (continued) Symbol Parameter V HS data DN J state level HSDNJ V HS data DN K state level HSDNK Chirp J level (differential V CHIRPJ voltage) Chirp K level (differential V CHIRPK voltage ...
Page 14
Electrical characteristics Table 7. Switching characteristics Symbol Parameter Reset t Width of reset pulse on RESETn pin RESETEXT UART mode t Switching time (max low to min high) C RISE t Switching time (min high to max low) C FALL ...
Page 15
STULPI01A - STULPI01B Table 7. Switching characteristics (continued) Symbol Parameter High-speed driver t Data rise time HSR t Data fall time HSF Waveform requirements including jitter DR High-speed data rate HS ULPI interface CLOCK (measured on CLK pin) f Frequency ...
Page 16
Electrical characteristics Figure 3. High-speed driver eye pattern Level 1 Level 2 Table 8. High-speed driver eye pattern Level 1 (1) Voltage level 525 mV (DP – DM) 475 mV Time (% of unit interval) 1. This value is valid ...
Page 17
STULPI01A - STULPI01B 5 Timing diagram Figure 4. Rise and fall time V OH_DRV V OL_DRV Figure 5. Simplified block diagram XI XI Oscillator Oscillator & & PLL PLL V DVIO GND CLK CLK DIR DIR STP STP ...
Page 18
Block description 6 Block description The STULPI01 integrates a comparator for the VBUS, ID line detector, differential HS data driver, differential and single-ended receivers, low dropout voltage regulators, and control logic. The STULPI01 provides a complete solution for connection of ...
Page 19
STULPI01A - STULPI01B 6.6 External charge pump It is possible to use an external charge pump or power switch controlled by the PSWn pin (active low open drain). This functionality is controlled by DrvVbus and DrvVbusExternal ULPI OTG Control register ...
Page 20
Block description Table 9. VB_REF_FAULT configuration bit settings RX CMD VBUS Valid VBUSVLD VBOC VBOC and VBUSVLD neg (FAULT) FAULT VBUSVLD and FAULT VBUS_VLD and neg (FAULT) 6.9 Voltage regulator Dual output ultra low dropout voltage regulator provides power supply ...
Page 21
STULPI01A - STULPI01B Figure 7. USB 2.0 PHY block diagram 6.12 Power saving features To reduce power consumption STULPI01 implements 2 low-power modes of operation. 1. Low-power mode, which is defined in ULPI specification. 2. Power-down mode to save more ...
Page 22
Block description Table 10. Car kit signals mapping Default car kit signals mapping (UART_DIR = 0) Signal TXD DATA[0] (input) RXD DATA[1] (output) <- reserved DATA[2] (input) INT DATA[3] (output) Car kit signals mapping (UART_DIR = 1) Signal TXD DATA[0] ...
Page 23
STULPI01A - STULPI01B Table 11. Low-power mode Signal Map to linestate (0) D0 linestate (1) D1 reserved D2 INT D3 Low-power mode is exited by asserting STP pin high. PLL is started immediately, and when the clock becomes stable, it ...
Page 24
Block description 6.18.3 External clock detection The square wave clock can be applied to the oscillator input. The input square wave clock amplitude is referenced to The XO pin can be left floating or grounded. 6.18.4 Reset behavior Typical startup ...
Page 25
STULPI01A - STULPI01B 6.18.7 High-speed mode entry In high-speed mode, the internal 480 MHz clock is generated by the DLL, which must be calibrated any time device enters high-speed mode by writing '00' to the XcvrSel field in the Function ...
Page 26
Block description Figure 10. High-speed mode entry Figure 11. UART mode entry (2.7 V) 26/44 Doc ID 14817 Rev 3 STULPI01A - STULPI01B AM04952v1 AM04953v1 ...
Page 27
STULPI01A - STULPI01B Figure 12. UART mode exit (2.7 V) Doc ID 14817 Rev 3 Block description AM04954v1 27/44 ...
Page 28
State transitions 7 State transitions Table 12. USB state transitions Signaling mode General settings 3-state drivers 3-state drivers with pull-down enabled Power- < V bus th(SESSEND) Host settings Host chirp Host hi-speed Host full-speed Host HS/FS suspend Host ...
Page 29
STULPI01A - STULPI01B Table 12. USB state transitions (continued) Peripheral test_J/Test_K Signaling mode OTG device, peripheral chirp OTG device, peripheral hi-speed OTG device, peripheral full-speed OTG device, peripheral HS/FS suspend OTG device peripheral, HS/FS resume OTG device peripheral, Test_J/Test_K 00b ...
Page 30
ULPI registers 8 ULPI registers Table 13. ULPI register map overview Field name Immediate register set Vendor ID low Vendor ID high Product ID low Product ID high Function control Interface control OTG control USB interrupt enable rising USB interrupt ...
Page 31
STULPI01A - STULPI01B Table 15. Vendor and product ID Register Bits VENDOR_ID_LOW 7:0 VENDOR_ID_HIGH 7:0 PRODUCT_ID_LOW 7:0 PRODUCT_ID_HIGH 7:0 Table 16. Power control register Field name Bits Reserved 0 Overcurrent_PD 1 UART_DIR 2 UART_2V7 3 Reserved 7:4 Note: 3Dh-3Fh Read, ...
Page 32
ULPI registers Table 17. Function control register Field name Bits XcvrSelect 1:0 TermSelect 2 OpMode 4:3 Reset 5 SuspendM 6 Reserved 7 Note: 04h-06h(Read), 04h(Write), 05h(Set), 06h(Clear). These addresses control UTMI function setting of the USB transceiver PHY. 32/44 Access ...
Page 33
STULPI01A - STULPI01B Table 18. Interface control register Field name Bits Access 6-pin 0 rd/wr/s/c FsLsSerialMode 3-pin 1 rd/wr/s/c FsLsSerialMode Carkit mode 2 rd/wr/s/c ClockSuspendM 3 rd/wr/s/c Reserved 4 rd/wr/s/c Indicator 5 rd/wr/s/c complement Indicator 6 rd/wr/s/c PassThru Interface protect ...
Page 34
ULPI registers Table 19. OTG control register Field name Bits Access IdPullup 0 rd/wr/s/c DpPulldown 1 rd/wr/s/c DmPulldown 2 rd/wr/s/c DischrgVbus 3 rd/wr/s/c ChrgVbus 4 rd/wr/s/c DrvVbus 5 rd/wr/s/c DrvVbus External 6 rd/wr/s/c UseExternal 7 rd/wr/s/c VbusIndicator Note: 0Ah-0Ch(Read), 0Ah(Write), ...
Page 35
STULPI01A - STULPI01B Table 20. USB interrupt enable rising register Field name Bits Host disconnect rise 0 VbusValid rise 1 SessValid rise 2 SessEnd rise 3 ID rise 4 Reserved 7:5 Note: 0Dh-0Fh(Read), 0Dh(Write), 0Eh(Set), 0Fh(Clear) If set, the bits ...
Page 36
ULPI registers Table 21. USB interrupt enable falling register Field name Bits Access Host disconnect fall 0 rd/wr/s/c VbusValid fall 1 rd/wr/s/c SessValid fall 2 rd/wr/s/c SessEnd fall 3 rd/wr/s/c ID fall 4 rd/wr/s/c Reserved 7:5 rd/wr/s/c Note: Address 10h-12h ...
Page 37
STULPI01A - STULPI01B Table 23. USB interrupt latch register Field name Bits Host disconnect 0 latch VbusValid latch 1 SessValid latch 2 SessEnd latch 3 ID latch 4 Reserved 7:5 Note: Address 14h (Read-only with auto clear) These bits are ...
Page 38
ULPI registers Table 25. Debug register Field name Bits LineState0 0 LineState1 1 Reserved 7:2 Note: Address 15h (Read-only) indicates the current value of various signals useful for debugging. Table 26. Scratch register Field name Bits Access Scratch 7:0 rd/wr/s/c ...
Page 39
STULPI01A - STULPI01B 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...
Page 40
Package mechanical data Dim. Min 0.78 b 0. 40/44 TFBGA36 mechanical data Typ. Max. 1.1 1. 0.86 0.30 ...
Page 41
STULPI01A - STULPI01B Tape & reel TFBGA36 mechanical data Dim. Min 12 3 Typ. Max ...
Page 42
... STULPI01ATBR f = 19.2 MHz, CSn/PWRDN = 0 “ON” µTFBGA36 (3.6 x 3.6 mm typ) 3000 parts per reel OSC (1) STULPI01BTBR MHz, CSn/PWRDN = 0 “ON” OSC 1. All these versions need digital external clock on XI pin; XO pin must be left floating or grounded (crystal is not supported). 42/44 Key differences µ ...
Page 43
STULPI01A - STULPI01B 11 Revision history Table 29. Document revision history Date Revision 20-Jun-2008 1 First release. Replaced “IV8VIO” with “DVIO” throughout datasheet; updated 24-Sep-2010 2 updated ECOPACK Updated 26-Jan-2011 3 formatting changes. Changes ® text in Section 9; reformatted ...
Page 44
... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...