ISP1504A1ETTM STEricsson, ISP1504A1ETTM Datasheet - Page 34

• Manufacturer Part Number: ISP1504A1ETTM
• Manufacturer: STEricsson

Specifications of ISP1504A1ETTM

• Lead Free Status / RoHS Status: Compliant

Table 17.
[1]
CD00222688
Product data sheet
Parameter name
RXCMD delay (J and K)
RXCMD delay (SE0)
TX start delay
TX end delay (packets)
TX end delay (SOF)
RX start delay
RX end delay
Fig 13. Example of using the ISP1504x1 to transmit and receive USB data
DATA [ 7:0 ]
According to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6, the TX and RX start or end delays must be used
for high-speed inter-packet timing. If the link uses RXCMDs for high-speed inter-packet timing, the result cannot be guaranteed.
CLOCK
NXT
STP
DIR
PHY pipeline delays
9.8.1.1 ISP1504x1 pipeline delays
9.8.1 USB packet timing
[1]
9.8 USB packet transmit and receive
An example of a packet transmit and receive is shown in
packets, refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1.
The ISP1504x1 delays are shown in
Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.2.
link sends
TXCMD
TXCMD
High-speed PHY delay
4
4
1 to 2
3 to 4
6 to 9
5 to 6
5 to 6
ISP1504x1
accepts
TXCMD
the next data;
DATA
ISP1504x1
link sends
accepts
Rev. 04 — 20 May 2010
link signals
end of data
Table
4 to 6
Full-speed PHY delay
4
6 to 10
not applicable
not applicable
not applicable
17 to 18
ULPI bus
ISP1504A1; ISP1504C1
is idle
17. For detailed description, refer to UTMI+
turnaround
asserts DIR,
ISP1504x1
turnaround
causing
cycle
RXCMD
ULPI HS USB OTG transceiver
Figure
ISP1504x1
(NXT LOW)
RXCMD
sends
Low-speed PHY delay
4
16 to 18
74 to 75
not applicable
not applicable
not applicable
122 to 123
13. For details on USB
DATA
(NXT HIGH)
ISP1504x1
USB data
© ST-ERICSSON 2010. All rights reserved.
sends
turnaround
DIR, causing
ISP1504x1
turnaround
deasserts
cycle
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