XR88C681CP/40 Exar Corporation, XR88C681CP/40 Datasheet - Page 17

• Manufacturer Part Number: XR88C681CP/40
• Description: Dual Channel UART
• Manufacturer: Exar Corporation

Specifications of XR88C681CP/40

• Features: *
• Number Of Channels: 2, DUART
• Fifo's: 1 Byte, 3 Byte
• Voltage - Supply: 5V
• With Parallel Port: Yes
• With Cmos: Yes
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev. 2.11
Bit 7
0
0
0
0
1
1
1
1
Table 3. Miscellaneous Commands, Upper Nibble of all Command Registers,
Bit 6
1
1
1
1
0
0
0
0
Unless Otherwise Specified (Cont’d)
Bit 5
0
0
1
1
0
0
1
1
Bit 4
17
0
1
0
1
0
1
0
1
Description
Reset Error Status. Clears the Received Break
(RB), Parity Error (PE), Framing Error (FE) and
Overrun Error (OE) status bits, SR[7:3].
Specifically, if the Error Mode, for a particular chan-
nel is set at “Block” Error Mode, this command will
reset all of the Receiver Error Indicators in the Status
Register. In the Block Error Mode, once either a PE,
FE, OE, or RB occurs, the error will continue to be
flagged in the Status Register, until this command is
issued.
If the Error Mode, for a particular channel is set to
“Character Error Mode”, then the contents of the
Status Register for PE, FE, and RB are reflected on
a character by character basis. In the “Character
Error Mode”, the state of these indicators is based
only upon the character that is at the top of the RHR.
The OE indicator is always presented as a “Block
Error Mode” indicator, and requires this command to
be reset.
Reset Break Change Interrupt. Clears the chan-
nel’s break change interrupt status bit.
Start Break. Forces the TXDn output low. The
transmitter must be enabled to start a break. If the
transmitter is empty, the start of the break may be
delayed up to two bit times. If the transmitter is ac-
tive, the break begins when the transmission of
those characters in the THR is completed, viz.,
TXEMP must be true before the break will begin.
Stop Break. The TXDn line will go high within two
bit times. TXDn will remain high for one bit time be-
fore the next character, if any, is transmitted.
Set Rx BRG Select Extend Bit. Sets the channel’s
“Receiver BRG Select Extend Bit” to 1.
Clear Rx BRG Select Extend Bit. Clears the chan-
nel’s “Receiver BRG Select Extend Bit” to 0.
Set Tx BRG Select Extend Bit. Sets the channel’s
“Transmitter BRG Select Extend Bit” to 1.
Clear Tx BRG Select Extend Bit. Clears the chan-
nel’s “Transmitter BRG Select Extend Bit” to 0.
XR88C681