PIC24FJ64GA110-I/PT Microchip Technology, PIC24FJ64GA110-I/PT Datasheet - Page 115

• Manufacturer Part Number: PIC24FJ64GA110-I/PT
• Description: 16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA110-I/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Processor Series: PIC24FJ256GA110
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.0
The oscillator system for PIC24FJ256GA110 family
devices has the following features:
• A total of four external and internal oscillator options
• On-chip 4x PLL to boost internal operating frequency
FIGURE 8-1:
 2010 Microchip Technology Inc.
Note:
as clock sources, providing 11 different clock modes
on select internal and external oscillator sources
SOSCO
SOSCI
OSCO
OSCI
OSCILLATOR
CONFIGURATION
Section 6. “Oscillator” (DS39700).
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Primary Oscillator
Secondary Oscillator
Oscillator
Oscillator
LPRC
FRC
Family
PIC24FJ256GA110 FAMILY CLOCK DIAGRAM
SOSCEN
Enable
Oscillator
(nominal)
31 kHz (nominal)
8 MHz
Reference
Manual”,
CLKDIV<10:8>
PIC24FJ256GA110 FAMILY
4 x PLL
8 MHz
4 MHz
• Software-controllable switching between various
• Software-controllable postscaler for selective
• A Fail-Safe Clock Monitor (FSCM) that detects
• A separate and independently configurable system
A simplified diagram of the oscillator system is shown
in
clock sources
clocking of CPU for system power savings
clock failure and permits safe application recovery
or shutdown
clock output for synchronizing external hardware
Figure
ECPLL,FRCPLL
XTPLL, HSPLL
XT, HS, EC
FRCDIV
8-1.
SOSC
LPRC
FRC
Clock Control Logic
Fail-Safe
Monitor
Clock
CLKDIV<14:12>
Reference Clock
WDT, PWRT
Clock Source Option
for Other Modules
Generator
REFOCON<15:8>
DIV/2
DS39905E-page 115
Peripherals
(F
CY
REFO
)
CLKO
CPU