PIC18F87K90T-I/PT Microchip Technology, PIC18F87K90T-I/PT Datasheet - Page 71

• Manufacturer Part Number: PIC18F87K90T-I/PT
• Description: 128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90T-I/PT

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Details

5.2
The MCLR pin provides a method for triggering a hard
external Reset of the device. A Reset is generated by
holding the pin low. PIC18 extended microcontroller
devices have a noise filter in the MCLR Reset path
which detects and ignores small pulses.
The MCLR pin is not driven low by any internal Resets,
including the WDT.
5.3
A Power-on Reset condition is generated on-chip
whenever V
allows the device to start in the initialized state when
V
To take advantage of the POR circuitry, tie the MCLR
pin through a resistor (1 k to 10 k) to V
eliminate external RC components usually needed to
create a Power-on Reset delay. A minimum rise rate for
V
time, see
When the device starts normal operation (exiting the
Reset condition), device operating parameters (such
as voltage, frequency and temperature) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
Power-on Reset events are captured by the POR bit
(RCON<1>). The state of the bit is set to ‘0’ whenever
a Power-on Reset occurs and does not change for any
other Reset event. POR is not reset to ‘1’ by any
hardware event. To capture multiple events, the user
manually resets the bit to ‘1’ in software following any
Power-on Reset.
5.4
The PIC18F87K90 family has four BOR modes:
• High-Power BOR
• Medium Power BOR
• Low-Power BOR
• Zero-Power BOR
Each power mode is selected by the BORPWR<1:0>
bits setting (CONFIG2L<6:5>). For low, medium and
high-power BOR, the module monitors the V
ing on the BORV<1:0> setting (CONFIG1L<3:2>). A
BOR event re-arms the Power-on Reset. It also causes
a Reset depending on which of the trip levels has been
set: 1.8V, 2V, 2.7V or 3V. The typical (IB
the Low and Medium Power BOR will be 0.75 A and
3 A.
 2009-2011 Microchip Technology Inc.
DD
DD
is adequate for operation.
is specified (Parameter D004). For a slow rise
Master Clear (MCLR)
Power-on Reset (POR)
Brown-out Reset (BOR)
Figure
DD
rises above a certain threshold. This
5-2.
OR
) trip level for
DD
DD
. This will
depend-
PIC18F87K90 FAMILY
In Zero-Power BOR (ZPBORMV), the module monitors
the V
ZPBORMV does not cause a Reset, but re-arms the
POR.
The BOR accuracy varies with its power level. The
lower the power setting, the less accurate the BOR trip
levels are. So, the high-power BOR has the highest
accuracy and the low-power BOR has the lowest accu-
racy. The trip levels (B
consumption
Power-Down and Supply Current PIC18F87K90
Family
below B
Section 31.0 “Electrical Characteristics”
FIGURE 5-2:
5.4.1
The BOR bit always resets to ‘0’ on any Brown-out
Reset or Power-on Reset event. This makes it difficult
to determine if a Brown-out Reset event has occurred
just by reading the state of BOR alone. A more reliable
method is to simultaneously check the state of both
POR and BOR. This assumes that the POR bit is reset
to ‘1’ in software immediately after any Power-on Reset
event. If BOR is ‘0’ while POR is ‘1’, it can be reliably
assumed that a Brown-out Reset event has occurred.
LP-BOR cannot be detected with the BOR bit in the
RCON register. LP-BOR can rearm the POR and can
cause a Power-on Reset.
Note 1: External Power-on Reset circuit is required
DD
V
VDD
(Industrial/Extended)”) and time required
2: R < 40 k is recommended to make sure that
3: R1  1 k will limit any current flowing into
DD
voltage and re-arms the POR at about 2V.
D
DETECTING BOR
only if the V
The diode, D, helps discharge the capacitor
quickly when V
the voltage drop across R does not violate
the device’s electrical specification.
MCLR from external capacitor, C, in the event
of MCLR/V
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
(T
(Section 31.2 “DC Characteristics:
BOR
V
DD
R
C
, Parameter 35) can all be found in
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
VDD
DD
PP
R1
DD
, Parameter D005), current
power-up slope is too slow.
pin breakdown, due to
powers down.
DD
MCLR
PIC18F87K90
POWER-UP)
DS39957D-page 71