PIC18F87K90T-I/PT Microchip Technology, PIC18F87K90T-I/PT Datasheet - Page 109

• Manufacturer Part Number: PIC18F87K90T-I/PT
• Description: 128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90T-I/PT

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Details

6.6.3
The use of Indexed Literal Offset Addressing mode
effectively changes how the lower part of Access RAM
(00h to 5Fh) is mapped. Rather than containing just the
contents of the bottom part of Bank 0, this mode maps
the contents from Bank 0 and a user-defined “window”
that can be located anywhere in the data memory
space.
The value of FSR2 establishes the lower boundary of
the addresses mapped into the window, while the
upper boundary is defined by FSR2 plus 95 (5Fh).
Addresses in the Access RAM above 5Fh are mapped
as previously described. (See
Bank”.) An example of Access Bank remapping in this
addressing mode is shown in
FIGURE 6-10:
 2009-2011 Microchip Technology Inc.
Example Situation:
ADDWF f, d, a
FSR2H:FSR2L = 120h
Locations in the region
from the FSR2 Pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to
Access RAM (000h-05Fh).
Special Function Registers
at F60h through FFFh are
mapped to 60h through
FFh, as usual.
Bank 0 addresses below
5Fh are not available in
this mode. They can still
be addressed by using the
BSR.
the
bottom
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET MODE
of
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL
OFFSET ADDRESSING
the
Figure
FFFh
05Fh
17Fh
F00h
F60h
000h
100h
120h
200h
Section 6.3.2 “Access
6-10.
Data Memory
Not Accessible
Window
Bank 14
Bank 15
through
Bank 0
Bank 1
Bank 2
SFRs
PIC18F87K90 FAMILY
Remapping the Access Bank applies only to operations
using the Indexed Literal Offset mode. Operations that
use the BSR (Access RAM bit = 1) will continue to use
Direct Addressing as before. Any Indirect or Indexed
Addressing operation that explicitly uses any of the
indirect file operands (including FSR2) will continue to
operate
instruction that uses the Access Bank, but includes a
register address of greater than 05Fh, will use Direct
Addressing and the normal Access Bank map.
6.6.4
Although the Access Bank is remapped when the
extended instruction set is enabled, the operation of the
BSR remains unchanged. Direct Addressing, using the
BSR to select the data memory bank, operates in the
same manner as previously described.
as
BSR IN INDEXED LITERAL
OFFSET MODE
standard
Indirect
Bank 1 “Window”
Access Bank
SFRs
DS39957D-page 109
Addressing.
00h
5Fh
60h
FFh
Any