PIC18F23K20-E/SP Microchip Technology, PIC18F23K20-E/SP Datasheet - Page 392

• Manufacturer Part Number: PIC18F23K20-E/SP
• Description: 8 KB Enh Flash, 768 RAM, 25 I/O Pb Free, Nanowatt XLP 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F23K20-E/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2XK20/4XK20
FIGURE 26-12:
TABLE 26-14: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
DS41303G-page 392
70
71
71A
72
72A
73
73A
74
75
76
78
79
80
Note 1:
Param
No.
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
SS
SCK
Note:
2:
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
Tb2b
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
Symbol
Refer to Figure 26-4 for load conditions.
EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
SCK Input High Time
SCK Output Fall Time (Master mode)
SS  to SCK  or SCK  Input
(Slave mode)
SCK Input Low Time
(Slave mode)
Setup Time of SDI Data Input to SCK Edge
Last Clock Edge of Byte 1 to the 1st Clock Edge
of Byte 2
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time
(Master mode)
SDO Data Output Valid after SCK Edge
70
80
71
73
MSb In
Characteristic
MSb
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
bit 6 - - - - - -1
bit 6 - - - -1
78
79
1.25 T
1.25 T
1.5 T
Min
T
100
100
CY
40
40
—
—
—
—
—
LSb
CY
CY
CY
79
78
LSb In
+ 40
+ 30
+ 30
 2010 Microchip Technology Inc.
Max Units
25
25
25
25
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
Conditions