PIC18F23K20-E/SP Microchip Technology, PIC18F23K20-E/SP Datasheet - Page 297

• Manufacturer Part Number: PIC18F23K20-E/SP
• Description: 8 KB Enh Flash, 768 RAM, 25 I/O Pb Free, Nanowatt XLP 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F23K20-E/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.5
In many applications, the ability to detect a drop below,
or rise above, a particular threshold is desirable. For
example, the HLVD module could be periodically
enabled to detect Universal Serial Bus (USB) attach or
detach. This assumes the device is powered by a lower
voltage source than the USB when detached. An attach
would indicate a high-voltage detect from, for example,
3.3V to 5V (the voltage on USB) and vice versa for a
detach. This feature could save a design a few extra
components and an attach signal (input pin).
For general battery applications, Figure 22-4 shows a
possible voltage curve. Over time, the device voltage
decreases. When the device voltage reaches voltage
V
The interrupt could cause the execution of an ISR,
which would allow the application to perform
“housekeeping tasks” and perform a controlled
shutdown before the device voltage exits the valid
operating range at T
application a time window, represented by the
difference between T
TABLE 22-1:
 2010 Microchip Technology Inc.
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
A
, the HLVD logic generates an interrupt at time T
Name
Applications
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
B
A
. The HLVD, thus, would give the
and T
B
, to safely exit.
Bit 6
C1IF
C1IE
C1IP
—
IRVST
C2IE
C2IP
Bit 5
C2IF
HLVDEN
INT0IE
A
EEIE
EEIP
Bit 4
EEIF
.
HLVDL3
FIGURE 22-4:
PIC18F2XK20/4XK20
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
V
V
A
B
Legend:
HLVDL2
TMR0IF
HLVDIE
HLVDIP
HLVDIF
Bit 2
V
V
A
B
= HLVD trip point
= Minimum valid device
HLVDL1
TMR3IF
TMR3IE
TMR3IP
TYPICAL LOW-VOLTAGE
DETECT APPLICATION
INT0IF
operating voltage
Bit 1
Time
T
A
HLVDL0
CCP2IF
CCP2IE
CCP2IP
DS41303G-page 297
RBIF
Bit 0
T
B
on Page
Values
Reset
60
59
62
62
62