PIC18F2221-E/SO Microchip Technology, PIC18F2221-E/SO Datasheet - Page 253

• Manufacturer Part Number: PIC18F2221-E/SO
• Description: 4KB, Flash, 512bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2221-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.0
PIC18F2221/2321/4221/4321 family devices have a
High/Low-Voltage Detect module (HLVD). This is a
programmable circuit that allows the user to specify both
a device voltage trip point and the direction of change
from that point. If the device experiences an excursion
past the trip point in that direction, an interrupt flag is set.
If the interrupt is enabled, the program execution will
branch to the interrupt vector address and the software
can then respond to the interrupt.
REGISTER 23-1:
The module is enabled by setting the HLVDEN bit.
Each time that the HLVD module is enabled, the
circuitry requires some time to stabilize. The IRVST bit
is a read-only bit and is used to indicate when the circuit
is stable. The module can only generate an interrupt
after the circuit is stable and IRVST is set.
© 2009 Microchip Technology Inc.
HIGH/LOW-VOLTAGE DETECT
(HLVD)
bit 7
bit 6
bit 5
bit 4
bit 3-0
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER
PIC18F2221/2321/4221/4321 FAMILY
bit 7
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL<3:0>)
0 = Event occurs when voltage equals or falls below trip point (HLVDL<3:0>)
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL<3:0>: Voltage Detection Limit bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
VDIRMAG
Legend:
R = Readable bit
-n = Value at POR
Note:
R/W-0
range
voltage range and the HLVD interrupt should not be enabled
See Table 27-4 in Section 27.0 “Electrical Characteristics” for the specifications.
U-0
—
IRVST
R-0
W = Writable bit
‘1’ = Bit is set
HLVDEN
R/W-0
The
(Register 23-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
The block diagram for the HLVD module is shown in
Figure 23-1.
The VDIRMAG bit determines the overall operation of
the module. When VDIRMAG is cleared, the module
monitors for drops in V
point. When the bit is set, the module monitors for rises
in V
DD
High/Low-Voltage
above the set point.
HLVDL3
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HLVDL2
R/W-1
DD
below a predetermined set
Detect
x = Bit is unknown
HLVDL1
R/W-0
DS39689F-page 253
Control
HLVDL0
R/W-1
register
bit 0