PIC16F1518-E/SP Microchip Technology, PIC16F1518-E/SP Datasheet - Page 91
![28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 2](/photos/16/11/161110/pdip28_sml.jpg)
PIC16F1518-E/SP
Manufacturer Part Number
PIC16F1518-E/SP
Description
28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 2
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F1516-EMV.pdf
(344 pages)
Specifications of PIC16F1518-E/SP
Processor Series
PIC16F151x
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
- Current page: 91 of 344
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9.0
The PIC16F151X has an internal Low Dropout
Regulator (LDO) which provides operation above 3.6V.
The LDO regulates a voltage for the internal device
logic while permitting the V
at a higher voltage. There is no user enable/disable
control available for the LDO, it is always active. The
PIC16LF151X operates at a maximum V
does not incorporate an LDO.
A device I/O pin may be configured as the LDO voltage
output, identified as the V
required, an external low-ESR capacitor may be con-
nected to the V
The VCAPEN bit of Configuration Word 2 enables the
V
TABLE 9-1:
TABLE 9-2:
2011 Microchip Technology Inc.
CONFIG2
Legend:
Note 1:
CAP
Name
pin. Refer to
VCAPEN
LOW DROPOUT (LDO)
VOLTAGE REGULATOR
— = unimplemented locations read as ‘0’. Shaded cells are not used by LDO.
PIC16F151X only.
0
Bits
13:8
7:0
CAP
VCAPEN SELECT BIT
SUMMARY OF CONFIGURATION WORD WITH LDO
Table
pin for additional regulator stability.
Bit -/7
—
9-1.
DD
CAP
and I/O pins to operate
Bit -/6
—
pin. Although not
RA5
Pin
DD
Bit 13/5
of 3.6V and
LVP
—
Preliminary
VCAPEN
Bit 12/4
DEBUG
On power-up, the external capacitor will load the LDO
voltage regulator. To prevent erroneous operation, the
device is held in Reset while a constant current source
charges the external capacitor. After the cap is fully
charged, the device is released from Reset. For more
information on recommended capacitor values and the
constant current rate, refer to the LDO Regulator
Characteristics Table in
Specifications”.
Bit 11/3
LPBOR
PIC16(L)F1516/7/8/9
—
Bit 10/2
BORV
—
STVREN
Bit 9/1
Section 25.0 “Electrical
WRT<1:0>
Bit 8/0
DS41452B-page 91
—
Register
on Page
48
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