PIC16F1518-E/SP Microchip Technology, PIC16F1518-E/SP Datasheet - Page 26
PIC16F1518-E/SP
Manufacturer Part Number
PIC16F1518-E/SP
Description
28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 2
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F1516-EMV.pdf
(344 pages)
Specifications of PIC16F1518-E/SP
Processor Series
PIC16F151x
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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PIC16(L)F1516/7/8/9
3.2.2
The Special Function Registers are registers used by
the application to control the desired operation of
peripheral functions in the device. The Special Function
Registers occupy the 20 bytes after the core registers of
every data memory bank (addresses x0Ch/x8Ch
through x1Fh/x9Fh). The registers associated with the
operation of the peripherals are described in the
appropriate peripheral chapter of this data sheet.
3.2.3
There are up to 80 bytes of GPR in each data memory
bank. The Special Function Registers occupy the 20
bytes after the core registers of every data memory
bank (addresses x0Ch/x8Ch through x1Fh/x9Fh).
3.2.3.1
The general purpose RAM can be accessed in a
non-banked method via the FSRs. This can simplify
access to large memory structures. See
“Linear Data Memory”
3.2.4
There are 16 bytes of common RAM accessible from all
banks.
DS41452B-page 26
SPECIAL FUNCTION REGISTER
GENERAL PURPOSE RAM
COMMON RAM
Linear Access to GPR
for more information.
Section 3.5.2
Preliminary
FIGURE 3-3:
3.2.5
The
PIC16(L)F1516/7 are as shown in
Table
7-bit Bank Offset
3-4, respectively.
memory
DEVICE MEMORY MAPS
0Ch
0Bh
1Fh
6Fh
7Fh
00h
20h
70h
maps
Special Function Registers
BANKED MEMORY
PARTITIONING
General Purpose RAM
2011 Microchip Technology Inc.
(20 bytes maximum)
(80 bytes maximum)
for
Memory Region
Core Registers
Common RAM
(12 bytes)
(16 bytes)
PIC16(L)F1516/7
Table 3-3
and
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