PIC16F1518-E/SP Microchip Technology, PIC16F1518-E/SP Datasheet - Page 89

• Manufacturer Part Number: PIC16F1518-E/SP
• Description: 28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 2.3V-5.5V 2
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1518-E/SP

• Processor Series: PIC16F151x
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: PDIP-28
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

8.2
The PIC16F151X device contains an internal Low
Dropout (LDO) voltage regulator, which allows the
device I/O pins to operate at voltages up to 5.5V while
the internal device logic operates at a lower voltage.
The LDO and its associated reference circuitry must
remain active when the device is in Sleep mode. The
PIC16F151X allows the user to optimize the operating
current in Sleep, depending on the application require-
ments.
A Low-Power Sleep mode can be selected by setting
the VREGPM bit of the VREGCON register. With this
bit set, the LDO and reference circuitry are placed in a
low-power state when the device is in Sleep.
8.2.1
In the default operating mode, the LDO and reference
circuitry remain in the normal configuration while in
Sleep. The device is able to exit Sleep mode quickly
since all circuits remain active. In Low-Power Sleep
mode, when waking up from Sleep, an extra delay time
is required for these circuits to return to the normal con-
figuration and stabilize.
The Low-Power Sleep mode is beneficial for applica-
tions that stay in Sleep mode for long periods of time.
The normal mode is beneficial for applications that
need to wake from Sleep quickly and frequently.
8.3
REGISTER 8-1:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-2
bit 1
bit 0
Note 1:
U-0
—
2:
Low-Power Sleep Mode
Power Control Registers
PIC16F151X only.
See
SLEEP CURRENT VS. WAKE-UP
TIME
Section 25.0 “Electrical
Unimplemented: Read as ‘0’
VREGPM: Voltage Regulator Power Mode Selection bit
1 = Low-Power Sleep mode enabled in Sleep
0 = Normal Power mode enabled in Sleep
Reserved: Read as ‘1’. Maintain this bit set.
Draws lowest current in Sleep, slower wake-up
Draws higher current in Sleep, faster wake-up
U-0
—
VREGCON: VOLTAGE REGULATOR CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
—
Specifications”.
U-0
Preliminary
—
(2)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(2)
8.2.2
Some peripherals that can operate in Sleep mode will
not operate properly with the Low-Power Sleep mode
selected. The LDO will remain in the normal power
mode when those peripherals are enabled. The Low-
Power Sleep mode is intended for use with these
peripherals:
• Brown-Out Reset (BOR)
• Watchdog Timer (WDT)
• External interrupt pin/Interrupt-on-change pins
• Timer1 (with external clock source)
• CCP (Capture mode)
U-0
—
Note:
PIC16(L)F1516/7/8/9
PERIPHERAL USAGE IN SLEEP
The PIC16LF151X does not have a con-
figurable
PIC16LF151X is an unregulated device
and is always in the lowest power state
when in Sleep, with no wake-up time pen-
alty. This device has a lower maximum
V
PIC16F151X. See
cal Specifications”
DD
U-0
—
and
Low-Power
I/O
VREGPM
R/W-0/0
(1)
Section 25.0 “Electri-
voltage
for more information.
DS41452B-page 89
Sleep
Reserved
than
R/W-1/1
mode.
bit 0
the