PIC12LF1840-I/MF Microchip Technology, PIC12LF1840-I/MF Datasheet - Page 19
![7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Nano](/photos/16/0/160077/dfn8_sml.jpg)
PIC12LF1840-I/MF
Manufacturer Part Number
PIC12LF1840-I/MF
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Nano
Manufacturer
Microchip Technology
Datasheet
1.PIC12F1840-IP.pdf
(382 pages)
Specifications of PIC12LF1840-I/MF
Processor Series
PIC12F
Core
PIC
Program Memory Type
Flash
Program Memory Size
7 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
DFN-8
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12LF1840-I/MF
Manufacturer:
MICROCHIP
Quantity:
887
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3.2.2
The Special Function Registers are registers used by
the application to control the desired operation of
peripheral functions in the device. The registers asso-
ciated with the operation of the peripherals are
described in the appropriate peripheral chapter of this
data sheet.
3.2.3
There are up to 80 bytes of GPR in each data memory
bank.
3.2.3.1
The general purpose RAM can be accessed in a
non-banked method via the FSRs. This can simplify
access to large memory structures. See
“Linear Data Memory”
3.2.4
There are 16 bytes of common RAM accessible from all
banks.
FIGURE 3-2:
2011 Microchip Technology Inc.
7-bit Bank Offset
SPECIAL FUNCTION REGISTER
GENERAL PURPOSE RAM
COMMON RAM
Linear Access to GPR
0Ch
0Bh
1Fh
6Fh
7Fh
00h
20h
70h
Special Function Registers
BANKED MEMORY
PARTITIONING
General Purpose RAM
(20 bytes maximum)
(80 bytes maximum)
for more information.
Memory Region
Core Registers
Common RAM
(12 bytes)
(16 bytes)
Section 3.5.2
Preliminary
3.2.5
The memory maps for the device family are as shown
in
TABLE 3-2:
Table
PIC12(L)F1840
3-2.
Device
DEVICE MEMORY MAPS
PIC12(L)F1840
MEMORY MAP TABLES
Banks
24-31
8-23
0-7
31
DS41441B-page 19
Table No.
Table 3-3
Table 3-4
Table 3-5
Table 3-6
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