82V1671JG8 IDT, Integrated Device Technology Inc, 82V1671JG8 Datasheet - Page 79
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82V1671JG8
Manufacturer Part Number
82V1671JG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1671JG8.pdf
(107 pages)
Specifications of 82V1671JG8
Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Operating Temperature Classification
Industrial
Pin Count
28
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
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RSLIC & CODEC CHIPSET
LREG13: PCM Data High Byte Register, Read Only (0CH)
LREG14: UTD RTIME Register, Read/Write (0DH/8DH)
LREG15: UTD RBKTime Register, Read/Write (0EH/8EH)
LREG16: UTD ETIME Register, Read/Write (0FH/8FH)
LREG17: UTD EBRKTime, Read/Write (10H/90H)
This register is used for the master processor to monitor the transmit (A to D) PCM data. For linear code, the high byte of PCM data is
sent to this register before it is transmitted to the PCM Encoder in the transmit path. For compressed code, this register is not used (in
this case, when read, a data byte of 00H will be read out).
This register is used to set the UTD Recognition Time (RTIME):
This register is used to set the UTD Recognition Break Time (RBKTime):
This register is used to set the UTD End Detection Time (ETIME):
This register is used to set the UTD End Detection Break Time (EBRKTime):
Command
Command
Command
Command
Command
I/O data
I/O data
I/O data
I/O data
I/O data
UTD_RT[7:0] = RTIME (ms)/16
The default value of UTD_RT[7:0] is 13H.
RTIME must be multiples of 16 ms. The range of it is: 0 ms ≤ RTIME ≤ 4000 ms.
UTD_RBK[7:0] = RBKTime (ms)/4
The default value of UTD_RBK[7:0] is 19H.
RBKTime must be multiples of 4 ms. The range of it is: 0 ms ≤ RBKTime ≤ 1000 ms.
UTD_ET[7:0] = ETIME (ms)/4
The default value of UTD_ET[7:0] is 40H.
ETIME must be multiples of 4 ms. The range of it is: 0 ms ≤ ETIME ≤ 1000 ms.
UTD_EBRK[7:0] = EBRKTime (ms)
The default value of UTD_EBRK[7:0] is 64H.
The range of the EBRKTime is: 0 ms ≤ EBRKTime ≤ 255 ms.
R/W
R/W
R/W
R/W
b7
b7
b7
b7
b7
0
b6
b6
b6
b6
b6
0
0
0
0
0
b5
b5
b5
b5
b5
0
0
0
0
0
.
This register is used for MPI mode only.
UTD_EBRK[7:0]
79
b4
b4
b4
b4
b4
0
0
0
UTD_RBK[7:0]
0
1
UTD_RT[7:0]
UTD_ET[7:0]
PCM[15:8]
b3
b3
b3
b3
b3
1
1
1
1
0
b2
b2
b2
b2
b2
1
1
1
1
0
IDT82V1671/IDT82V1671A, IDT82V1074
b1
b1
b1
b1
b1
0
0
1
1
0
b0
b0
b0
b0
b0
0
1
0
1
0
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